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2021-01-13radv: enable DCC for MSAA on GFX10+21.0-branchpointSamuel Pitoiset1-6/+4
It should work fine now. This gives +1-2% improvements with Control MSAA (2x and 4x) on Sienna. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8413>
2021-01-13pan/bi: Fix the !immediate case in bi_emit_store_vary()Boris Brezillon1-10/+17
The base offset was ignored, take it into account. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8469>
2021-01-13nouveau: trigger the current fence's work on destroy explicitlyIlia Mirkin1-1/+4
Otherwise the delete yells at us that there's still work pending. This isn't an actual problem, but annoying to see each time. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8462>
2021-01-13frontends/va: Return an error if non-interlaced buffer is not supportedThong Thai1-2/+13
Add a check to vaDeriveImage to see if a non-interlaced buffer was created successfully. Otherwise, return an error, since we won't be able to derive an image from the interlaced buffer. Prevents a null pointer dereference from occuring on some nVidia cards, reported by Alexander Kapshuk. v2: Check for PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE support (Ilia) Fixes: fcb558321e6 ("frontends/va: Derive image from interlaced buffers") Signed-off-by: Thong Thai <thong.thai@amd.com> Tested-by: Alexander Kapshuk <alexander.kapshuk@gmail.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8320>
2021-01-13radv: Use L2 coherency on GFX9+.Bas Nieuwenhuizen3-64/+94
Especially on GFX10 we can avoid pretty much all L2 flushes. However, instead of that we have to do L2_METADATA invalidations. We do that every time we could possibly be reading new DCC/HTILE info from the L2 cache in shaders. Benchmark results, basemark on high preset with a navi10 on profile_standard (which is slower than a navi10 on default settings, please don't compare to random navi10 results you find) before: 5932 5928 5937 after: 6011 6013 6009 So this looks like a >1% increase. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7202>
2021-01-13radv: Use L2 for CP DMA on GFX9+.Bas Nieuwenhuizen1-4/+13
This enables assuming that the L2 is always up to date for barriers. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7202>
2021-01-13radv: Use access helpers for flushing with meta operations.Bas Nieuwenhuizen10-72/+96
This way we're properly using the vulkan barrier paradigm instead of adhoc guessing what caches need to be flushed. This is more robust for cache policy changes as we now don't have to revisit all the meta operations all the time. Note that a barrier has both a src and dst part though. So barrier: flush src meta op flush dst becomes barrier: flush barrier src flush meta op dst meta op flush meta op src flush barrier dst And there are some places where we've been able to replace a CB flush with a shader flush because that is what we'd need according to vulkan rules (and it turns out that in the cases the CB flush mattered the app will set the bit in one of the relevant flushes or it was needed as a result of an optimization that we counter-acted in the previous patch.) Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7202>
2021-01-13radv: Do dst invalidations for write accesses.Bas Nieuwenhuizen1-1/+7
For write-after-write hazards. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7202>
2021-01-13radv: Invalidate CB on SHADER_WRITE for meta operations.Bas Nieuwenhuizen1-0/+12
To cancel the optimization in radv_dst_access_flush if these helpers get used by meta operations. We could also remove that optimization but I think this triggers less often as all SHADER_WRITE flushes on images not supporting STORAGE should be meta Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7202>
2021-01-13radv: Remove redundant WB_L2 flush.Bas Nieuwenhuizen1-1/+0
INV_L2 already does that. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7202>
2021-01-13panfrost: Implement alpha testing nativelyAlyssa Rosenzweig4-3/+12
On Midgard, we still have to lower on v6+. Passes Piglit ./fbo-mrt-alphatest (saving a cycle in the fragment shader to compare/discard). Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8447>
2021-01-13panfrost: Add alpha reference to XMLAlyssa Rosenzweig1-0/+1
Midgard only, v6 dropped support. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8447>
2021-01-13panfrost: Handle explicit primitive restartAlyssa Rosenzweig1-10/+14
Don't fall back. Passes piglit ./bin/primitive-restart on Bifrost. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8447>
2021-01-13radv: disable VK_EXT_sample_locations again on GFX10+Samuel Pitoiset1-1/+1
I attempted to enable it for 21.0, only 2x and 4x were supported but there is new failures if DCC+MSAA is enabled. Disable it again because DCC is more important than this feature and no Mesa releases have it on GFX10+. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8472>
2021-01-13panfrost: Fix panfrost_afbc_format_needs_fixup()Boris Brezillon1-1/+9
This function returns true for PIPE_FORMAT_R8G8B8X8_UNORM, which is wrong. Fixes: 44217be92134 ("panfrost: Adjust the format for AFBC textures on Bifrost v7") Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8466>
2021-01-13radv: enable DCC for mipmaps on GFX10+Samuel Pitoiset1-7/+2
Seems to work fine. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8468>
2021-01-13radv: do not enable DCC for 3D images with mipmaps on GFX10+Samuel Pitoiset1-0/+6
This is broken for some reasons, and probably rare enough to care for now. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8468>
2021-01-13radv: add support for fast-clearing DCC levels on GFX10+Samuel Pitoiset1-5/+4
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8468>
2021-01-13radv: prevent fast-clearing uncompressed DCC levelsSamuel Pitoiset1-0/+4
When size is 0, this means the level can't be compressed. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8468>
2021-01-13ac/surface: store DCC mip info into the surfaceSamuel Pitoiset2-0/+11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8468>
2021-01-13pan/bi: Implement TEXS for cube mapsAlyssa Rosenzweig1-30/+54
Saves a few instructions in the common case. Requires refactoring the TEXS check. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8287>
2021-01-13aco/tests: don't rely on argument evaluation orderRhys Perry1-21/+21
The argument evaluation order is implementation-defined and affects the order the instructions are inserted. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3938 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7945>
2021-01-13v3d: add fast-path tile-based blit for depth/stencil buffersJuan A. Suarez Romero2-31/+51
This extends the TLB based blit to support both depth and stencil buffers. v2: - Ammend comment for further clarification (Iago) - Remove parenthesis (Iago) - Remove condition so separate stencil blit is done (Iago) Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8304>
2021-01-13v3d: check blit mask inside blit subpathsJuan A. Suarez Romero1-39/+42
Move the blit mask check (RGBA, Depth/Stencil) inside the blit paths (stencil, TFU, TLB and render blit paths). v2: - Add missing Fixes tag (Iago) Fixes: 1c76f6e755a ("v3d: implement tile-based blit operation") Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8304>
2021-01-13radv: skip fast-clear eliminate for CMASK based on a predicateSamuel Pitoiset1-1/+3
If we have CMASK, we can also skip FCE like we do for DCC. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8332>
2021-01-13radv: update the FCE predicate for fast clears using CMASKSamuel Pitoiset1-4/+8
Fast clearing with CMASK should always be eliminated. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8332>
2021-01-13radv: allocate and initialize the FCE predicate value for CMASK tooSamuel Pitoiset2-4/+6
In case we don't have DCC, we can still predicate FCE with CMASK. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8332>
2021-01-13radv: only use predication if the FCE value is allocatedSamuel Pitoiset1-1/+1
The FCE predicate value is only allocated if DCC is enabled. We only want to use predication for DCC decompressions and for FCE but not having FMASK doesn't mean the predicate is allocated. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4075 Fixes: 6e7008e94ba ("radv: do not predicate FMASK decompression when DCC+MSAA is used") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8441>
2021-01-13turnip: implement indirect dispatchDanylo Piliaiev2-3/+36
Vulkan guarantees only 4 byte alignment of offset for vkCmdDrawIndirect, while CP_LOAD_STATE.EXT_SRC_ADDR requires 16 byte alignment which makes us copy indirect parameters to a correctly aligned buffer. Blob does essentially the same but emits indirect CP_LOAD_STATE with src = SS6_UBO and EXT_SRC_ADDR = 0xe0000, and only for a first dispatch. Fixes: dEQP-VK.compute.indirect_dispatch.* Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8444>
2021-01-13turnip: remove unused IR3_DP_LOCAL_GROUP_SIZE_* from cs paramsDanylo Piliaiev1-4/+3
In Turnip local group size is lowered in NIR via nir_lower_compute_system_values. Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8444>
2021-01-13st/mesa: use the correct src format in ReadPixelsPierre-Eric Pelloux-Prayer1-1/+1
If reading from an FBO that uses a texture view src->format will be the format of the original texture, not from the view. Acked-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8387>
2021-01-13mesa/fbo: don't check_end_texture_render on fb read changePierre-Eric Pelloux-Prayer1-3/+0
Otherwise this resets is_rtt to false in st/mesa, and then breaks fbo + texture view. This change also aligns the code with the comment above: * Note that if the ReadBuffer has texture attachments we don't consider * that a render-to-texture case. Acked-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8387>
2021-01-13st/mesa: consider texture view format for fbo blitsPierre-Eric Pelloux-Prayer1-1/+1
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4034 Acked-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8387>
2021-01-13r600/nir: use "unreachable" instead of "assert"Gert Wollny1-2/+2
In release builds the assert goes away resulting in build failures because no return value was specified. Fixes 165fb5117bf70402e66d34538d4085e060f57fea r600/sfn: add lowering passes to get 64 bit ops lowered to 32 bit vec2 Closes #4089 Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8465>
2021-01-13radv: fix clearing DCC on GFX9Samuel Pitoiset1-1/+5
dcc_slice_size is in DWORD on GFX9... Also, layers aren't supported because they might be interleaved. Fix this by clearing the entire DCC buffer. Fixes: 5e8f6967b1d ("radv: add support for fast-clearing DCC layers on GFX9+") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8443>
2021-01-13v3d: mark some variables static constChristian Gmeiner1-3/+3
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8438>
2021-01-13v3d: update fallthrough commentsChristian Gmeiner1-2/+2
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8438>
2021-01-13v3d: drop not use function parameterChristian Gmeiner1-2/+2
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8438>
2021-01-12nv50/ir: Initialize CodeEmitterGM107 members in constructor.Vinson Lee1-1/+4
Fix defects reported by Coverity Scan. uninit_member: Non-static class member progType is not initialized in this constructor nor in any functions that it calls. uninit_member: Non-static class member insn is not initialized in this constructor nor in any functions that it calls. uninit_member: Non-static class member data is not initialized in this constructor nor in any functions that it calls. Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7390>
2021-01-13panfrost: Fix size assertion in bi_alu_src_indexIcecream951-1/+1
Shifting by the bitsize was not only wrong, the shift is undefined behavior when bitsize is 32, causing the assertion to fire on AArch32. Fixes: 95d62ee7cfa ("pan/bi: Add bi_alu_src_index helper") Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8460>
2021-01-13dri: Restrict glthread for CS:GO to radeonsiNanley Chery1-4/+1
Fixes a ~12% performance regression in iris. Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8448>
2021-01-13pan/bi: Add some zero bytes after shaders on BifrostIcecream951-0/+4
Bifrost will prefetch bytes after the end of shaders, so make sure these bytes are allocated and zeroed. Fixes GPU faults in Xonotic. Suggested-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8428>
2021-01-13pan/bi: Add a define for the Bifrost shader prefetch sizeIcecream951-0/+4
Found by adding NOPs to the start of a shader and checking dmesg to see at what sizes the GPU faulted trying to read the following non-executable page. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8428>
2021-01-12radeonsi: Only set modifier creation function for GFX9+ & with kernel support.Bas Nieuwenhuizen3-5/+14
Fixes: c786150dfa5 ("radeonsi: Add modifier support.") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3963 Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8407>
2021-01-12panfrost: Re-enable AFBC on 3D, 2D arraysBoris Brezillon1-6/+2
Things have now been fixed and AFBC on 3D/2D-arrays seems to work fine. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8449>
2021-01-12panfrost: Fix estimate_texture_payload_size() on BifrostBoris Brezillon3-12/+21
Bifrost mandates manual stride usage. Fixes: a3d2936a8e9e ("panfrost: The texture descriptor has a pointer to a trampoline") Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8449>
2021-01-12panfrost: Pass the resource dimension to panfrost_compression_tag()Boris Brezillon1-1/+4
The reload surface logic creates 2D image views pointing to a specific 3D texture layer, but panfrost_compression_tag() cares about the resource dimension, not the image view one. Fixes: 4dd7991422ce ("panfrost: Add a pan_image_layout object") Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8449>
2021-01-12panfrost: Get layer stride of level 0 on staging resourcesBoris Brezillon1-1/+5
Staging resources have one level, we shouldn't query the stride of level > 0. Fixes: 3c92abe35937 ("panfrost: Use panfrost_get_layer_stride() instead of open-coding it") Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8449>
2021-01-12vulkan/overlay: fix vkGetInstanceProcAddr self-resolvingGeorg Lehmann1-0/+1
vkGetInstanceProcAddr(instance, "vkGetInstanceProcAddr") should return our vkGetInstanceProcAddr not the next in the chain. CC: mesa-stable Signed-off-by: Georg Lehmann <dadschoorse@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8285>
2021-01-12panfrost: Dual-source blending on BifrostIcecream952-6/+23
Tested with the arb_blend_func_extended Piglit tests and Alacritty. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8455>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-27 10:45:56 +0000