diff options
author | Rhys Perry <pendingchaos02@gmail.com> | 2020-12-06 10:38:40 +0000 |
---|---|---|
committer | Marge Bot <eric+marge@anholt.net> | 2021-01-13 13:04:26 +0000 |
commit | 8301d483ff8d153e5c3e4c14e87463c65d7fc0d1 (patch) | |
tree | 1b7937a576b321dcea6ddb1cdecf5e290612f329 /src | |
parent | f58a11460dddf771b5b35bbb1ee5de4b588b4d21 (diff) |
aco/tests: don't rely on argument evaluation order
The argument evaluation order is implementation-defined and affects the
order the instructions are inserted.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3938
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7945>
Diffstat (limited to 'src')
-rw-r--r-- | src/amd/compiler/tests/test_optimizer.cpp | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/src/amd/compiler/tests/test_optimizer.cpp b/src/amd/compiler/tests/test_optimizer.cpp index 08cd7d1e0bc..e885001c614 100644 --- a/src/amd/compiler/tests/test_optimizer.cpp +++ b/src/amd/compiler/tests/test_optimizer.cpp @@ -647,33 +647,33 @@ BEGIN_TEST(optimize.const_comparison_ordering) //! s2: %tmp6_1 = v_cmp_neq_f32 %a, %a //! s2: %res6, s1: %_:scc = s_and_b64 %tmp6_1, %tmp6_0 //! p_unit_test 6, %res6 - writeout(6, bld.sop2(aco_opcode::s_and_b64, bld.def(bld.lm), bld.def(s1, scc), - bld.vopc(aco_opcode::v_cmp_neq_f32, bld.def(bld.lm), inputs[0], inputs[0]), - bld.vopc(aco_opcode::v_cmp_lt_f32, bld.def(bld.lm), Operand(0x40800000u), inputs[0]))); + Temp src1 = bld.vopc(aco_opcode::v_cmp_lt_f32, bld.def(bld.lm), Operand(0x40800000u), inputs[0]); + Temp src0 = bld.vopc(aco_opcode::v_cmp_neq_f32, bld.def(bld.lm), inputs[0], inputs[0]); + writeout(6, bld.sop2(aco_opcode::s_and_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1)); //! s2: %tmp7_0 = v_cmp_nge_f32 4.0, %a //! s2: %tmp7_1 = v_cmp_eq_f32 %a, %a //! s2: %res7, s1: %_:scc = s_or_b64 %tmp7_1, %tmp7_0 //! p_unit_test 7, %res7 - writeout(7, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), - bld.vopc(aco_opcode::v_cmp_eq_f32, bld.def(bld.lm), inputs[0], inputs[0]), - bld.vopc(aco_opcode::v_cmp_nge_f32, bld.def(bld.lm), Operand(0x40800000u), inputs[0]))); + src1 = bld.vopc(aco_opcode::v_cmp_nge_f32, bld.def(bld.lm), Operand(0x40800000u), inputs[0]); + src0 = bld.vopc(aco_opcode::v_cmp_eq_f32, bld.def(bld.lm), inputs[0], inputs[0]); + writeout(7, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1)); //! s2: %tmp8_0 = v_cmp_lt_f32 4.0, %d //! s2: %tmp8_1 = v_cmp_neq_f32 %a, %a //! s2: %res8, s1: %_:scc = s_or_b64 %tmp8_1, %tmp8_0 //! p_unit_test 8, %res8 - writeout(8, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), - bld.vopc(aco_opcode::v_cmp_neq_f32, bld.def(bld.lm), inputs[0], inputs[0]), - bld.vopc(aco_opcode::v_cmp_lt_f32, bld.def(bld.lm), Operand(0x40800000u), inputs[3]))); + src1 = bld.vopc(aco_opcode::v_cmp_lt_f32, bld.def(bld.lm), Operand(0x40800000u), inputs[3]); + src0 = bld.vopc(aco_opcode::v_cmp_neq_f32, bld.def(bld.lm), inputs[0], inputs[0]); + writeout(8, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1)); //! s2: %tmp9_0 = v_cmp_lt_f32 4.0, %a //! s2: %tmp9_1 = v_cmp_neq_f32 %a, %d //! s2: %res9, s1: %_:scc = s_or_b64 %tmp9_1, %tmp9_0 //! p_unit_test 9, %res9 - writeout(9, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), - bld.vopc(aco_opcode::v_cmp_neq_f32, bld.def(bld.lm), inputs[0], inputs[3]), - bld.vopc(aco_opcode::v_cmp_lt_f32, bld.def(bld.lm), Operand(0x40800000u), inputs[0]))); + src1 = bld.vopc(aco_opcode::v_cmp_lt_f32, bld.def(bld.lm), Operand(0x40800000u), inputs[0]); + src0 = bld.vopc(aco_opcode::v_cmp_neq_f32, bld.def(bld.lm), inputs[0], inputs[3]); + writeout(9, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1)); /* bit sizes */ //! v2b: %b16 = p_extract_vector %b, 0 @@ -699,25 +699,25 @@ BEGIN_TEST(optimize.const_comparison_ordering) //! s2: %tmp12_1 = v_cmp_neq_f16 %a, %a //! s2: %res12, s1: %_:scc = s_or_b64 %tmp12_1, %tmp12_0 //! p_unit_test 12, %res12 - writeout(12, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), - bld.vopc(aco_opcode::v_cmp_neq_f16, bld.def(bld.lm), inputs[0], inputs[0]), - bld.vopc(aco_opcode::v_cmp_lt_f16, bld.def(bld.lm), Operand(nan16), inputs[0]))); + src1 = bld.vopc(aco_opcode::v_cmp_lt_f16, bld.def(bld.lm), Operand(nan16), inputs[0]); + src0 = bld.vopc(aco_opcode::v_cmp_neq_f16, bld.def(bld.lm), inputs[0], inputs[0]); + writeout(12, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1)); //! s2: %tmp13_0 = v_cmp_lt_f32 0x7fc00000, %a //! s2: %tmp13_1 = v_cmp_neq_f32 %a, %a //! s2: %res13, s1: %_:scc = s_or_b64 %tmp13_1, %tmp13_0 //! p_unit_test 13, %res13 - writeout(13, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), - bld.vopc(aco_opcode::v_cmp_neq_f32, bld.def(bld.lm), inputs[0], inputs[0]), - bld.vopc(aco_opcode::v_cmp_lt_f32, bld.def(bld.lm), Operand(nan32), inputs[0]))); + src1 = bld.vopc(aco_opcode::v_cmp_lt_f32, bld.def(bld.lm), Operand(nan32), inputs[0]); + src0 = bld.vopc(aco_opcode::v_cmp_neq_f32, bld.def(bld.lm), inputs[0], inputs[0]); + writeout(13, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1)); //! s2: %tmp14_0 = v_cmp_lt_f64 -1, %a //! s2: %tmp14_1 = v_cmp_neq_f64 %a, %a //! s2: %res14, s1: %_:scc = s_or_b64 %tmp14_1, %tmp14_0 //! p_unit_test 14, %res14 - writeout(14, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), - bld.vopc(aco_opcode::v_cmp_neq_f64, bld.def(bld.lm), inputs[0], inputs[0]), - bld.vopc(aco_opcode::v_cmp_lt_f64, bld.def(bld.lm), Operand(nan64), inputs[0]))); + src1 = bld.vopc(aco_opcode::v_cmp_lt_f64, bld.def(bld.lm), Operand(nan64), inputs[0]); + src0 = bld.vopc(aco_opcode::v_cmp_neq_f64, bld.def(bld.lm), inputs[0], inputs[0]); + writeout(14, bld.sop2(aco_opcode::s_or_b64, bld.def(bld.lm), bld.def(s1, scc), src0, src1)); finish_opt_test(); END_TEST |