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BranchCommit messageAuthorAge
11.1docs: add sha256 checksums for 11.1.4Emil Velikov20 months
11.2docs: add sha256 checksums for 11.2.2Emil Velikov20 months
12.0docs: use correct year for the 12.0.6 release notesEmil Velikov11 months
13.0docs: add sha256 checksums for 13.0.6Emil Velikov10 months
17.0docs: add sha256 checksums for 17.0.7Emil Velikov7 months
17.1docs: add sha256 checksums for 17.1.10Juan A. Suarez Romero3 months
17.2docs: add sha256 checksums for 17.2.8Andres Gomez12 days
17.3docs: add sha256 checksums for 17.3.1Emil Velikov14 days
gbm-streamsmisg genxml changesKristian Høgsberg Kristensen18 months
mastermesa/bindless: fix missing image _Layer initializationIlia Mirkin33 min.
[...]
 
TagDownloadAuthorAge
mesa-17.2.8commit 3482790712...Andres Gomez12 days
mesa-17.3.1commit 4f5e85e9e9...Emil Velikov14 days
mesa-17.2.7commit 834c36fa65...Emil Velikov3 weeks
mesa-17.3.0commit 8d55da9f57...Emil Velikov4 weeks
mesa-17.3.0-rc6commit 30abe7dfae...Emil Velikov4 weeks
mesa-17.2.6commit 00b52f8e99...Andres Gomez6 weeks
mesa-17.3.0-rc5commit d1e6cf4639...Emil Velikov6 weeks
mesa-17.3.0-rc4commit cb9d207ff3...Emil Velikov7 weeks
mesa-17.2.5commit ae52410bf0...Andres Gomez8 weeks
mesa-17.3.0-rc3commit 19b62847e0...Emil Velikov8 weeks
[...]
 
AgeCommit messageAuthorFilesLines
33 min.mesa/bindless: fix missing image _Layer initializationHEADmasterIlia Mirkin1-0/+1
7 hoursradeonsi: fix alpha-to-coverage if color writes are disabledJózef Kucia1-0/+3
8 hoursac: rename has_sync_file to has_fence_to_handle.Bas Nieuwenhuizen4-6/+6
9 hoursac/nir: Handle loading data from compact arrays.Bas Nieuwenhuizen1-6/+7
9 hoursradv: Allow writing 0 scissors.Bas Nieuwenhuizen1-1/+2
9 hoursradv: Use correct HTILE expanded words.Bas Nieuwenhuizen1-2/+4
9 hoursac: rename has_syncobj_wait -> has_syncobj_wait_for_submitMarek Olšák4-7/+7
9 hoursbraodcom/vc5: Fix internal type/bpp for RGB10_A2UI images.Eric Anholt1-0/+1
9 hoursbroadcom/vc5: Try to fix up compressed texture load/store.Eric Anholt1-2/+15
9 hoursbroadcom/vc5: Fix image_h value for CPU-side tiling on miplevels > 1.Eric Anholt1-1/+2
[...]
 
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