diff options
| author | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2021-01-12 13:55:54 +0100 |
|---|---|---|
| committer | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2021-01-13 08:33:40 +0100 |
| commit | dbe845624bbbe8b34cf1cf85fe54869d71ca3528 (patch) | |
| tree | c69af2d9a9784cdfbbabb332879351429cdf65f5 /src | |
| parent | 36e1c902b9fd793c5581447c0da463d3175562e1 (diff) | |
radv: fix clearing DCC on GFX9
dcc_slice_size is in DWORD on GFX9... Also, layers aren't supported
because they might be interleaved. Fix this by clearing the entire
DCC buffer.
Fixes: 5e8f6967b1d ("radv: add support for fast-clearing DCC layers on GFX9+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8443>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/vulkan/radv_meta_clear.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index 66e9db40d04..decc5d4e18d 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -1412,12 +1412,16 @@ radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer, uint32_t level = range->baseMipLevel + l; uint64_t size; - if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) { + if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10) { /* Mipmap levels aren't implemented. */ assert(level == 0); offset += image->planes[0].surface.dcc_slice_size * range->baseArrayLayer; size = image->planes[0].surface.dcc_slice_size * layer_count; + } else if (cmd_buffer->device->physical_device->rad_info.chip_class == GFX9) { + /* Mipmap levels and layers aren't implemented. */ + assert(level == 0); + size = image->planes[0].surface.dcc_size; } else { const struct legacy_surf_level *surf_level = &image->planes[0].surface.u.legacy.level[level]; |