summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
AgeCommit message (Expand)AuthorFilesLines
2016-04-15i965/vec4: Add support for SHADER_OPCODE_MOV_INDIRECTJason Ekstrand1-0/+67
2016-03-30i965/vec4/tcs: Set conditional mod on TCS_OPCODE_SRC0_010_IS_ZERO.Matt Turner1-1/+0
2016-03-17i965/vec4/gen6: fix exec_size for MOV with a width of 4 in generate_gs_ff_sync()Samuel Iglesias Gonsalvez1-1/+3
2016-03-17i965/vec4/gen6: fix exec_size for instructions with destination width of 4Samuel Iglesias Gonsalvez1-0/+6
2016-03-17i965/vec4/gen6: fix exec_size for instructions with width of 4 in generate_gs...Samuel Iglesias Gonsalvez1-0/+3
2016-02-09i965/vec4: Plumb separate surfaces and samplers through from NIRJason Ekstrand1-1/+1
2016-02-09i965/vec4: Separate the sampler from the surface in generate_texJason Ekstrand1-5/+13
2016-02-09i965: Explicitly write the "TR DS Cache Disable" bit at TCS EOT.Kenneth Graunke1-1/+4
2016-01-13i965: Drop extra newline from shader compile messages.Matt Turner1-1/+1
2016-01-08glsl: Move _mesa_shader_stage_to_string/abbrev to shader_enums.cKristian Høgsberg Kristensen1-1/+0
2015-12-28i965: Don't set interleave or complete on TCS EOT message.Kenneth Graunke1-2/+34
2015-12-28i965: Relase input URB Handles on Gen7/7.5 when TCS threads finish.Kenneth Graunke1-0/+46
2015-12-28i965: Use proper TCS barrier ID bits for Ivybridge/Baytrail.Kenneth Graunke1-4/+6
2015-12-28i965: Use proper TCS Instance ID bits for Ivybridge/Baytrail.Kenneth Graunke1-2/+5
2015-12-28i965: Port tessellation evaluation shaders to vec4 mode.Kenneth Graunke1-0/+61
2015-12-22i965: Add tessellation control shaders.Kenneth Graunke1-0/+247
2015-12-07i965/vec4: Use byte offsets for UBO pulls on Sandy BridgeJason Ekstrand1-2/+15
2015-11-26i965/gen9+: Switch thread scratch space to non-coherent stateless access.Francisco Jerez1-2/+2
2015-11-24i965: Clean up #includes in the compiler.Matt Turner1-0/+1
2015-11-24i965: Push down inclusion of brw_program.h.Matt Turner1-0/+1
2015-11-24i965: Prevent implicit upcasts to brw_reg.Matt Turner1-5/+5
2015-11-13i965: Remove fixed_hw_reg field from backend_reg.Matt Turner1-6/+6
2015-11-13i965: Make 'dw1' and 'bits' unnamed structures in brw_reg.Matt Turner1-18/+23
2015-11-12i965: Add initial assembly validation pass.Matt Turner1-0/+8
2015-11-12i965: Set annotation_info's mem_ctx.Matt Turner1-1/+1
2015-11-05i965/vec4: Do not mark used surfaces in VS_OPCODE_GET_BUFFER_SIZEIago Toral Quiroga1-2/+0
2015-11-05i965/vec4: Do not mark used direct surfaces in VS_OPCODE_PULL_CONSTANT_LOADIago Toral Quiroga1-9/+0
2015-11-05i965/vec4/skl+: Use ld2dms_w instead of ld2dmsNeil Roberts1-0/+5
2015-10-30i965: dump scheduling cycle estimatesConnor Abbott1-5/+6
2015-10-29i965/vec4: Test against BRW_IMMEDIATE_VALUE, not IMM.Matt Turner1-1/+1
2015-10-29i965/vec4: Drop brw_set_default_* before popping insn state.Matt Turner1-3/+0
2015-10-29i965/vec4: Remove unnecessary #includes from the generator.Matt Turner1-8/+0
2015-10-29i965/vec4: Eliminate the vec4_generator class altogether.Kenneth Graunke1-284/+180
2015-10-29i965/vec4: Move vec4_generator class definition into the .cpp file.Kenneth Graunke1-0/+110
2015-10-29i965/vec4: Wrap vec4_generator in a C function.Kenneth Graunke1-0/+19
2015-10-29i965/vec4: Convert src_reg/dst_reg to brw_reg at the end of the visitor.Kenneth Graunke1-107/+5
2015-10-19i965/vec4: Remove gl_program and gl_shader_program from the generatorJason Ekstrand1-14/+10
2015-10-19i965/asm: Explicitly use a nir_instr for IR annotationsJason Ekstrand1-1/+1
2015-09-26i965/gs: Allow src0 immediates in GS_OPCODE_SET_WRITE_OFFSET.Kenneth Graunke1-2/+7
2015-09-26i965: Move GS_THREAD_END mlen calculations out of the generator.Kenneth Graunke1-1/+1
2015-09-25i965/vec4: Implement VS_OPCODE_GET_BUFFER_SIZESamuel Iglesias Gonsalvez1-0/+31
2015-09-21i965: Turn BRW_MAX_MRF into a macro that accepts a hardware generationIago Toral Quiroga1-5/+5
2015-09-21i965: Move MRF register asserts out of brw_reg.hIago Toral Quiroga1-0/+2
2015-09-21i965: Maximum allowed size of SEND messages is 15 (4 bits)Iago Toral Quiroga1-0/+2
2015-09-10i965: add support for textureSamples functionIlia Mirkin1-0/+4
2015-07-29Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()Anuj Phogat1-1/+1
2015-07-29i965: Lift the constness restriction on surface indices passed to untyped ops.Francisco Jerez1-6/+2
2015-06-23i965: Remove the dependance on brw_context from the generatorsJason Ekstrand1-1/+2
2015-06-23i965: Plumb compiler debug logging through a function pointer in brw_compilerJason Ekstrand1-13/+8
2015-06-16i965/vec4: Fix the source register for indexed samplersNeil Roberts1-0/+3