index
:
mesa/mesa
10.0
10.1
10.2
10.3
10.4
10.5
10.6
11.0
11.1
11.2
12.0
13.0
17.0
17.1
17.2
17.3
18.0
18.1
18.2
18.3
19.0
19.1
19.2
19.3
20.0
20.1
20.2
20.3
21.0
21.1
21.2
21.3
22.0
22.1
22.2
22.3
23.0
23.1
23.2
23.3
24.0
24.1
7.10
7.11
7.8
7.8-gles
7.9
8.0
9.0
9.1
9.2
a7xx-gmem
amber
elima/radv-video-encode-caps-maxbitrate
explicit-sync
main
powervr-mesa-next-wayland
review/fragment_shader_barycentric
staging/23.2
staging/23.3
staging/24.0
staging/24.1
uav-counter-meta
vk-no-nir-android
zink-stablefix
The Mesa 3D Graphics Library (mirrored from https://gitlab.freedesktop.org/mesa/mesa)
brianp
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
mesa
/
drivers
/
dri
/
i965
/
brw_vec4_generator.cpp
Age
Commit message (
Expand
)
Author
Files
Lines
2016-04-15
i965/vec4: Add support for SHADER_OPCODE_MOV_INDIRECT
Jason Ekstrand
1
-0
/
+67
2016-03-30
i965/vec4/tcs: Set conditional mod on TCS_OPCODE_SRC0_010_IS_ZERO.
Matt Turner
1
-1
/
+0
2016-03-17
i965/vec4/gen6: fix exec_size for MOV with a width of 4 in generate_gs_ff_sync()
Samuel Iglesias Gonsalvez
1
-1
/
+3
2016-03-17
i965/vec4/gen6: fix exec_size for instructions with destination width of 4
Samuel Iglesias Gonsalvez
1
-0
/
+6
2016-03-17
i965/vec4/gen6: fix exec_size for instructions with width of 4 in generate_gs...
Samuel Iglesias Gonsalvez
1
-0
/
+3
2016-02-09
i965/vec4: Plumb separate surfaces and samplers through from NIR
Jason Ekstrand
1
-1
/
+1
2016-02-09
i965/vec4: Separate the sampler from the surface in generate_tex
Jason Ekstrand
1
-5
/
+13
2016-02-09
i965: Explicitly write the "TR DS Cache Disable" bit at TCS EOT.
Kenneth Graunke
1
-1
/
+4
2016-01-13
i965: Drop extra newline from shader compile messages.
Matt Turner
1
-1
/
+1
2016-01-08
glsl: Move _mesa_shader_stage_to_string/abbrev to shader_enums.c
Kristian Høgsberg Kristensen
1
-1
/
+0
2015-12-28
i965: Don't set interleave or complete on TCS EOT message.
Kenneth Graunke
1
-2
/
+34
2015-12-28
i965: Relase input URB Handles on Gen7/7.5 when TCS threads finish.
Kenneth Graunke
1
-0
/
+46
2015-12-28
i965: Use proper TCS barrier ID bits for Ivybridge/Baytrail.
Kenneth Graunke
1
-4
/
+6
2015-12-28
i965: Use proper TCS Instance ID bits for Ivybridge/Baytrail.
Kenneth Graunke
1
-2
/
+5
2015-12-28
i965: Port tessellation evaluation shaders to vec4 mode.
Kenneth Graunke
1
-0
/
+61
2015-12-22
i965: Add tessellation control shaders.
Kenneth Graunke
1
-0
/
+247
2015-12-07
i965/vec4: Use byte offsets for UBO pulls on Sandy Bridge
Jason Ekstrand
1
-2
/
+15
2015-11-26
i965/gen9+: Switch thread scratch space to non-coherent stateless access.
Francisco Jerez
1
-2
/
+2
2015-11-24
i965: Clean up #includes in the compiler.
Matt Turner
1
-0
/
+1
2015-11-24
i965: Push down inclusion of brw_program.h.
Matt Turner
1
-0
/
+1
2015-11-24
i965: Prevent implicit upcasts to brw_reg.
Matt Turner
1
-5
/
+5
2015-11-13
i965: Remove fixed_hw_reg field from backend_reg.
Matt Turner
1
-6
/
+6
2015-11-13
i965: Make 'dw1' and 'bits' unnamed structures in brw_reg.
Matt Turner
1
-18
/
+23
2015-11-12
i965: Add initial assembly validation pass.
Matt Turner
1
-0
/
+8
2015-11-12
i965: Set annotation_info's mem_ctx.
Matt Turner
1
-1
/
+1
2015-11-05
i965/vec4: Do not mark used surfaces in VS_OPCODE_GET_BUFFER_SIZE
Iago Toral Quiroga
1
-2
/
+0
2015-11-05
i965/vec4: Do not mark used direct surfaces in VS_OPCODE_PULL_CONSTANT_LOAD
Iago Toral Quiroga
1
-9
/
+0
2015-11-05
i965/vec4/skl+: Use ld2dms_w instead of ld2dms
Neil Roberts
1
-0
/
+5
2015-10-30
i965: dump scheduling cycle estimates
Connor Abbott
1
-5
/
+6
2015-10-29
i965/vec4: Test against BRW_IMMEDIATE_VALUE, not IMM.
Matt Turner
1
-1
/
+1
2015-10-29
i965/vec4: Drop brw_set_default_* before popping insn state.
Matt Turner
1
-3
/
+0
2015-10-29
i965/vec4: Remove unnecessary #includes from the generator.
Matt Turner
1
-8
/
+0
2015-10-29
i965/vec4: Eliminate the vec4_generator class altogether.
Kenneth Graunke
1
-284
/
+180
2015-10-29
i965/vec4: Move vec4_generator class definition into the .cpp file.
Kenneth Graunke
1
-0
/
+110
2015-10-29
i965/vec4: Wrap vec4_generator in a C function.
Kenneth Graunke
1
-0
/
+19
2015-10-29
i965/vec4: Convert src_reg/dst_reg to brw_reg at the end of the visitor.
Kenneth Graunke
1
-107
/
+5
2015-10-19
i965/vec4: Remove gl_program and gl_shader_program from the generator
Jason Ekstrand
1
-14
/
+10
2015-10-19
i965/asm: Explicitly use a nir_instr for IR annotations
Jason Ekstrand
1
-1
/
+1
2015-09-26
i965/gs: Allow src0 immediates in GS_OPCODE_SET_WRITE_OFFSET.
Kenneth Graunke
1
-2
/
+7
2015-09-26
i965: Move GS_THREAD_END mlen calculations out of the generator.
Kenneth Graunke
1
-1
/
+1
2015-09-25
i965/vec4: Implement VS_OPCODE_GET_BUFFER_SIZE
Samuel Iglesias Gonsalvez
1
-0
/
+31
2015-09-21
i965: Turn BRW_MAX_MRF into a macro that accepts a hardware generation
Iago Toral Quiroga
1
-5
/
+5
2015-09-21
i965: Move MRF register asserts out of brw_reg.h
Iago Toral Quiroga
1
-0
/
+2
2015-09-21
i965: Maximum allowed size of SEND messages is 15 (4 bits)
Iago Toral Quiroga
1
-0
/
+2
2015-09-10
i965: add support for textureSamples function
Ilia Mirkin
1
-0
/
+4
2015-07-29
Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()
Anuj Phogat
1
-1
/
+1
2015-07-29
i965: Lift the constness restriction on surface indices passed to untyped ops.
Francisco Jerez
1
-6
/
+2
2015-06-23
i965: Remove the dependance on brw_context from the generators
Jason Ekstrand
1
-1
/
+2
2015-06-23
i965: Plumb compiler debug logging through a function pointer in brw_compiler
Jason Ekstrand
1
-13
/
+8
2015-06-16
i965/vec4: Fix the source register for indexed samplers
Neil Roberts
1
-0
/
+3
[next]