diff options
| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2015-11-23 16:01:44 -0800 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2015-12-07 21:51:23 -0800 |
| commit | e3e70698c3cfa7e9acccd6eddfb37516c45d5ac2 (patch) | |
| tree | b4aef58b682600a51b4ee0339ef1b7723bb79efb /src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | |
| parent | 6ef8149bcd1f11c7e4b6e9191bfd9ba6d31170e1 (diff) | |
i965/vec4: Use byte offsets for UBO pulls on Sandy Bridge
Previously, the VS_OPCODE_PULL_CONSTANT_LOAD opcode operated on
vec4-aligned byte offsets on Iron Lake and below and worked in terms of
vec4 offsets on Sandy Bridge. On Ivy Bridge, we add a new *LOAD_GEN7
variant which works in terms of vec4s. We're about to change the GEN7
version to work in terms of bytes, so this is a nice unification.
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_generator.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp index 434c4dc420a..c3426ddd1c8 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp @@ -903,8 +903,21 @@ generate_pull_constant_load(struct brw_codegen *p, gen6_resolve_implied_move(p, &header, inst->base_mrf); - brw_MOV(p, retype(brw_message_reg(inst->base_mrf + 1), BRW_REGISTER_TYPE_D), - offset); + if (devinfo->gen >= 6) { + if (offset.file == BRW_IMMEDIATE_VALUE) { + brw_MOV(p, retype(brw_message_reg(inst->base_mrf + 1), + BRW_REGISTER_TYPE_D), + brw_imm_d(offset.ud >> 4)); + } else { + brw_SHR(p, retype(brw_message_reg(inst->base_mrf + 1), + BRW_REGISTER_TYPE_D), + offset, brw_imm_d(4)); + } + } else { + brw_MOV(p, retype(brw_message_reg(inst->base_mrf + 1), + BRW_REGISTER_TYPE_D), + offset); + } uint32_t msg_type; |