diff options
Diffstat (limited to 'src/amd/vulkan')
-rw-r--r-- | src/amd/vulkan/radv_device.c | 8 | ||||
-rw-r--r-- | src/amd/vulkan/radv_formats.c | 4 | ||||
-rw-r--r-- | src/amd/vulkan/radv_image.c | 4 |
3 files changed, 8 insertions, 8 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 2800de4384d..0120a6e05f2 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -4140,7 +4140,7 @@ radv_sparse_image_bind_memory(struct radv_device *device, const VkSparseImageMem offset = surface->u.gfx9.surf_slice_size * layer + surface->u.gfx9.prt_level_offset[level]; pitch = surface->u.gfx9.prt_level_pitch[level]; } else { - offset = surface->u.legacy.level[level].offset + + offset = (uint64_t)surface->u.legacy.level[level].offset_256B * 256 + surface->u.legacy.level[level].slice_size_dw * 4 * layer; pitch = surface->u.legacy.level[level].nblk_x; } @@ -6322,7 +6322,7 @@ radv_initialise_color_surface(struct radv_device *device, struct radv_color_buff const struct legacy_surf_level *level_info = &surf->u.legacy.level[iview->base_mip]; unsigned pitch_tile_max, slice_tile_max, tile_mode_index; - cb->cb_color_base += level_info->offset >> 8; + cb->cb_color_base += level_info->offset_256B; if (level_info->mode == RADEON_SURF_MODE_2D) cb->cb_color_base |= surf->tile_swizzle; @@ -6633,8 +6633,8 @@ radv_initialise_ds_surface(struct radv_device *device, struct radv_ds_buffer_inf if (stencil_only) level_info = &surf->u.legacy.stencil_level[level]; - z_offs += surf->u.legacy.level[level].offset; - s_offs += surf->u.legacy.stencil_level[level].offset; + z_offs += (uint64_t)surf->u.legacy.level[level].offset_256B * 256; + s_offs += (uint64_t)surf->u.legacy.stencil_level[level].offset_256B * 256; ds->db_depth_info = S_02803C_ADDR5_SWIZZLE_MASK(!radv_image_is_tc_compat_htile(iview->image)); ds->db_z_info = S_028040_FORMAT(format) | S_028040_ZRANGE_PRECISION(1); diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c index 925444d3fd0..5770e2789bb 100644 --- a/src/amd/vulkan/radv_formats.c +++ b/src/amd/vulkan/radv_formats.c @@ -1814,9 +1814,9 @@ radv_GetImageSparseMemoryRequirements2(VkDevice _device, image->planes[0].surface.u.gfx9.surf_slice_size; } else { req->memoryRequirements.imageMipTailOffset = - image->planes[0] + (uint64_t)image->planes[0] .surface.u.legacy.level[req->memoryRequirements.imageMipTailFirstLod] - .offset; + .offset_256B * 256; req->memoryRequirements.imageMipTailSize = image->size - req->memoryRequirements.imageMipTailOffset; req->memoryRequirements.imageMipTailStride = 0; diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index eb3b9ac47de..94a380d22ed 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -688,7 +688,7 @@ si_set_mutable_tex_desc_fields(struct radv_device *device, struct radv_image *im else va += plane->surface.u.gfx9.surf_offset; } else - va += base_level_info->offset; + va += (uint64_t)base_level_info->offset_256B * 256; state[0] = va >> 8; if (chip_class >= GFX9 || base_level_info->mode == RADEON_SURF_MODE_2D) @@ -2126,7 +2126,7 @@ radv_GetImageSubresourceLayout(VkDevice _device, VkImage _image, if (image->type == VK_IMAGE_TYPE_3D) pLayout->size *= u_minify(image->info.depth, level); } else { - pLayout->offset = surface->u.legacy.level[level].offset + + pLayout->offset = (uint64_t)surface->u.legacy.level[level].offset_256B * 256 + (uint64_t)surface->u.legacy.level[level].slice_size_dw * 4 * layer; pLayout->rowPitch = surface->u.legacy.level[level].nblk_x * surface->bpe; pLayout->arrayPitch = (uint64_t)surface->u.legacy.level[level].slice_size_dw * 4; |