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path: root/src/amd/vulkan
AgeCommit message (Expand)AuthorFilesLines
9 hoursradv: rename radv_create_shaders() to radv_graphics_pipeline_compile()Samuel Pitoiset1-16/+17
9 hoursradv: split radv_create_shaders() between graphics and compute shadersSamuel Pitoiset3-65/+176
9 hoursradv: pass the number of stages to radv_hash_shaders()Samuel Pitoiset3-5/+5
9 hoursradv: simplify VK_PIPELINE_CREATE_FAIL_ON_PIPELINE_COMPILE_REQUIREDSamuel Pitoiset1-6/+2
3 daysradv: Loop over shader stages in flush_indirect_descriptor_sets.Tatsuyuki Ishi1-19/+3
3 daysradv: Fix emitting tess indirect descriptors twice.Tatsuyuki Ishi1-1/+1
3 daysradv: add a layer for fixing rendering issues with RAGE2Samuel Pitoiset3-1/+62
3 daysradv: Optimize emitting prefetchesTuro Lamminen1-4/+6
3 daysradv: Avoid redundant fetch of radv_deviceTuro Lamminen1-10/+9
3 daysradv: Clean up variables in si_get_ia_multi_vgt_paramTuro Lamminen1-28/+26
3 daysradv: Change radeon_cmdbuf counters to uint64_t to make alias analysis optimi...Turo Lamminen1-2/+5
3 daysmeson: do not reconstruct ICD pathsErik Faye-Lund1-2/+2
4 daysradv, aco, ac: Implement pack_half_2x16_rtz_split.Timur Kristóf1-0/+1
4 daysradv: fix ignoring graphics shader stages that don't need to be importedSamuel Pitoiset3-5/+15
4 daysradv: fix creating libraries with PS epilog and all CB states as dynamicSamuel Pitoiset1-4/+5
5 daysaco: Remove dynamic VS input loads.Timur Kristóf1-2/+2
5 daysradv: Lower dynamic VS inputs in NIR.Timur Kristóf1-0/+58
5 daysradv, aco: Add uses_full_subgroups to compute shader info.Timur Kristóf5-1/+16
5 daysradv: Get rid of app_shaders_internal.Timur Kristóf6-13/+11
5 daysradv/rmv: Correct timestamp shiftingFriedrich Vock1-2/+2
5 daysradv/rmv: Log bo destruction before freeing itFriedrich Vock1-9/+9
5 daysradv/rmv: Avoid more CPU unmap deadlocksFriedrich Vock1-1/+1
5 daysradv/rmv: Also check the other pid fieldFriedrich Vock1-1/+1
5 daysradv/winsys: prefix all error messages with RADVSamuel Pitoiset1-1/+1
5 daysradv: Move constant flushing check out to callers.Mike Blumenkrantz1-13/+29
5 daysradv: Merge the leaf and internal converterKonstantin Seurer8-216/+100
5 daysradv: skip creation of null TLAS for null winsysRhys Perry1-0/+3
5 daysradv: fix RADV_DEBUG=hang with multiple cmdbuffer per submissionSamuel Pitoiset1-1/+3
5 daysradv: Reduce descriptor pool allocation for alignment.Bas Nieuwenhuizen1-1/+12
5 daysradv: Strictly limit alignment needed within a descriptor set.Bas Nieuwenhuizen1-215/+265
6 daysradv: allow NULL initial_preamble_cs in radv_amdgpu_winsys_cs_submit_sysmem()Yogesh Mohan Marimuthu1-3/+4
6 daysradv: fence complete struct is 4 qw sizeYogesh Mohan Marimuthu1-2/+8
6 daysradv: INDEX_TYPE and NUM_INSTANCES PKT3 are not shadowedYogesh Mohan Marimuthu1-2/+4
6 daysradv: set preemp flag and pre_ena bit for shadowregsYogesh Mohan Marimuthu3-9/+20
6 daysradv: add support for register shadowingYogesh Mohan Marimuthu5-7/+199
6 daysradv: add shadowregs variable to RADV_DEBUG environment variableYogesh Mohan Marimuthu2-0/+2
6 daysradv: print depth image size with RADV_DEBUG=imgSamuel Pitoiset1-2/+2
6 daysradv/winsys: fix incorrect PCIID for GFX11 in the null winsysSamuel Pitoiset1-1/+1
7 daysradv: stop using radv_pipeline_has_stage() in BindPipelineMike Blumenkrantz1-4/+4
8 daysradv: add an early out in radv_cmd_buffer_flush_dynamic_state()Mike Blumenkrantz1-1/+4
9 daysradv: Enable extended SAH for shallow BVHsKonstantin Seurer1-4/+16
9 daysradv: Wrap internal build type inside a build_config structKonstantin Seurer1-20/+28
9 daysradv: Add a shader variant for PLOC with extended SAHKonstantin Seurer3-0/+19
9 daysradv/bvh: Add a define for extended SAHKonstantin Seurer2-1/+11
9 daysradv/bvh/meson: Add the option to set definesKonstantin Seurer2-22/+62
10 daysradv: remove redundant type sizingMike Blumenkrantz1-1/+1
10 daysradv: add some graphics pipeline hints to optimize pipeline bindMike Blumenkrantz3-5/+15
10 daysradv: simplify depth aspect check in radv_handle_image_transition()Mike Blumenkrantz1-1/+1
10 daysradv: reorder dynamic state checks during bindMike Blumenkrantz1-50/+29
10 daysradv: repack radv_graphics_pipeline structMike Blumenkrantz1-26/+25