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path: root/lib/Target/ARM64/ARM64InstrFormats.td
AgeCommit message (Expand)AuthorFilesLines
2014-05-15ARM64: print correct aliases for NEON mov & mvn instructionsTim Northover1-7/+3
2014-05-15[ARM64] Parse fixed vector lanes properly so that diagnostics can be emittedBradley Smith1-42/+55
2014-05-15[ARM64] Add/Fixup diagnostics for floating point immediatesBradley Smith1-0/+1
2014-05-15[ARM64] Add condition code operand type such that proper diagnostics can be e...Bradley Smith1-16/+18
2014-05-15[ARM64] Add more simple diagnostics for immediate/shift rangesBradley Smith1-10/+13
2014-05-13[ARM64] Fix the misleading diagnostic on bad extend amount of reg+reg address...Kevin Qin1-0/+1
2014-05-12TableGen: use PrintMethods to print more aliasesTim Northover1-4/+12
2014-05-12AArch64/ARM64: implement "mov $Rd, $Imm" aliases in TableGen.Tim Northover1-0/+1
2014-05-12ARM64: merge "extend" and "shift" addressing-mode enums.Tim Northover1-2/+8
2014-05-12[ARM64] Add proper bounds checking/diagnostics to logical shiftsBradley Smith1-6/+22
2014-05-12[ARM64] Correct more bounds checks/diagnostics for arithmetic shift operandsBradley Smith1-1/+1
2014-05-12[ARM64] Move register/register MOV handling into tablegen and improve diagnos...Bradley Smith1-2/+8
2014-05-08[ARM64] Add diagnostics for expected arithmetic shiftsBradley Smith1-10/+20
2014-05-08[ARM64] Re-work parsing of ADD/SUB shifted immediate operandsBradley Smith1-13/+33
2014-05-08[ARM64] Ensure immediates in extend operands are in a valid rangeBradley Smith1-1/+6
2014-05-06AArch64/ARM64: add more specific diagnostic for invalid vector lanesTim Northover1-4/+9
2014-05-06AArch64/ARM64: produce more informative diagnostic assembling some immediatesTim Northover1-19/+13
2014-05-02ARM64: refactor NEON post-indexed loads & stores (MC).Tim Northover1-69/+95
2014-04-30AArch64/ARM64: add specific diagnostic for MRS/MSR and enable tests.Tim Northover1-0/+2
2014-04-30AArch64/ARM64: accept and print floating-point immediate 0 as "#0.0"Tim Northover1-18/+37
2014-04-30AArch64/ARM64: expunge CPSR from the sourcesTim Northover1-49/+50
2014-04-30ARM64: remove duplication by templating InstPrinter methodsTim Northover1-17/+17
2014-04-30ARM64: use hex immediates for movz/movk instructionsTim Northover1-0/+1
2014-04-30ARM64: hexify printing various immediate operandsTim Northover1-0/+3
2014-04-28[ARM64]Fix a bug cannot select UQSHL/SQSHL with constant i64 shift amount.Hao Liu1-2/+4
2014-04-25[ARM64] Support crc predicate on ARM64.Kevin Qin1-0/+1
2014-04-24AArch64/ARM64: add support for :abs_gN_s: MOVZ modifiersTim Northover1-0/+9
2014-04-24AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operandsTim Northover1-10/+19
2014-04-23[ARM64] Enable feature predicates for NEON / FP / CRYPTO.Kevin Qin1-17/+28
2014-04-22AArch64/ARM64: make use of ANDS and BICS instructions for comparisons.Tim Northover1-3/+9
2014-04-22AArch64/ARM64: add patterns for scalar_to_vector/extract pairsTim Northover1-0/+4
2014-04-15AArch64/ARM64: add half as a storage type on ARM64.Tim Northover1-8/+8
2014-04-15AArch64/ARM64: copy patterns for fixed-point conversionsTim Northover1-15/+46
2014-04-14ARM64: add patterns for csXYZ with reversed operands.Tim Northover1-0/+13
2014-04-09Fix some doc and comment typosAlp Toker1-1/+1
2014-04-09[ARM64] Change SYS without a register to an alias to make disassembling more ...Bradley Smith1-16/+0
2014-04-09[ARM64] Properly support both apple and standard syntax for FMOVBradley Smith1-11/+10
2014-04-09[ARM64] When printing a pre-indexed address with #0, the ', #0' is not optional.Bradley Smith1-2/+23
2014-04-09[ARM64] Fixup ADR/ADRP parsing such that they accept immediates and all label...Bradley Smith1-0/+2
2014-04-09[ARM64] Add a PostEncoderMethod to FCMP - the Rm field should canonically be ...Bradley Smith1-1/+3
2014-04-09[ARM64] SCVTF and FCVTZS/U are undefined if scale<5> == 0.Bradley Smith1-2/+6
2014-04-09[ARM64] EXT and EXTR instructions on v8i8 and W regs respectively must have t...Bradley Smith1-1/+5
2014-04-09[ARM64] Scaled fixed-point FCVTZSs should also have bit 29 set to zero.Bradley Smith1-1/+1
2014-04-09[ARM64] UBFM/BFM is undefined on w registers when imms<5> or immr<5> is 1.Bradley Smith1-0/+6
2014-04-09[ARM64] Floating point to fixed point scaled conversions are only available o...Bradley Smith1-2/+6
2014-04-09[ARM64] Port over the PostEncoderMethod fix for SMULH/UMULH from AArch64.Bradley Smith1-1/+5
2014-04-09[ARM64] Rework system register parsing to overcome SPSel clash in MSR variants.Bradley Smith1-7/+3
2014-04-09[ARM64] Port over the PostEncoderMethod from AArch64 for exclusive loads and ...Bradley Smith1-4/+17
2014-04-09[ARM64] Switch the decoder, disassembler, instprinter and asmparser over to u...Bradley Smith1-10/+25
2014-04-09[ARM64] Add missing 1Q -> 1q vector kind aliasBradley Smith1-0/+2
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