index
:
~tstellar/llvm
9.1-abi-fix
Nov13-test
Oct18-backup
assembler
assembler-Jan-06-2015
assembler-push
backup-Oct15
backup-Oct18
bfgminer
bfgminer-perf
cayman-only-bfgminer
clover-elf
clover-elf-v2
hazard-rec
hsa
image-support
indirect-addressing
indirect-wip
indirect-wip-2
indirect-wip-3
indirect-wip-4
indirect-wip-5
kernel-args-WIP
lds
lds-v2
long-alu
madk
master
master-testing
master-testing-patches
master-testing-patches-v2
master-testing-si
master-testing-v2
mi-sched-experimental
native
opencv-Sep18-patches
perf-Dec31-2014
perf-Jan-08-2015
push-jan16
r600
r600-May09
r600-alu-encoding
r600-final-push
r600-gen-fixes
r600-imm-flags
r600-initial-review
r600-initial-review-May11
r600-master
r600-private-mem-fixes
r600-private-memory
r600-review-v10
r600-review-v3
r600-review-v7
r600-review-v8
r600-review-v9
r600-rewrite-pats
r600-structurizer
r600-structurizer-v2
r600-tablegen-hwreg
r600-tablegen-reg-encoding
r600-vliw
remove-fold-operands
sched-fixes
sched-perf-Mar-27-2015
si-compute
si-compute-v3
si-fold
si-lowercase
si-scheduler
si-scheduler-v2
si-scheduler-v3
si-sgpr-copies
si-spill-fixes
si-spill-fixes-v2
si-spill-fixes-v3
si-spill-fixes-v4
smrd-cluster
struct-divergence
struct-divergence-v1
vgpr-spilling-Jan07-2014
vinterp-fix
vliw5-rebase
vlj-bottom-up
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2014-05-16
R600/SI: Implement VGPR register spilling v2
si-spill-fixes-v4
Tom Stellard
6
-13
/
+245
2014-05-15
[ARM64] Improve diagnostics for Cn operands in SYS instructions
Bradley Smith
1
-69
/
+24
2014-05-15
[X86] Teach the backend how to fold SSE4.1/AVX/AVX2 blend intrinsics.
Andrea Di Biagio
1
-2
/
+54
2014-05-15
[mips][mips64r6] Add CLASS.fmt instructions
Zoran Jovanovic
1
-5
/
+9
2014-05-15
[mips][mips64r6] Add RINT.fmt instructions
Zoran Jovanovic
2
-2
/
+29
2014-05-15
[mips][mips64r6] Add SELEQZ/SELNEZ.fmt instructions
Zoran Jovanovic
1
-4
/
+21
2014-05-15
[mips][mips64r6] Add MAX/MIN/MAXA/MINA.fmt instructions
Zoran Jovanovic
1
-7
/
+35
2014-05-15
R600/SI: Stop using VSrc_* as the default register class for types.
Tom Stellard
2
-63
/
+11
2014-05-15
R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopies
Tom Stellard
2
-7
/
+28
2014-05-15
R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0
Tom Stellard
1
-5
/
+6
2014-05-15
R600/SI: Use VALU instructions for i1 ops
Tom Stellard
2
-11
/
+29
2014-05-15
TableGen: use correct MIOperand when printing aliases
Tim Northover
3
-36
/
+20
2014-05-15
[mips][mips64r6] Add bitswap, and dbitswap
Daniel Sanders
3
-4
/
+32
2014-05-15
Instead of littering asserts throughout the code after every call to
Jay Foad
1
-2
/
+0
2014-05-15
ARM64: print correct aliases for NEON mov & mvn instructions
Tim Northover
2
-15
/
+7
2014-05-15
[mips][mips64r6] Add align and dalign
Daniel Sanders
5
-10
/
+64
2014-05-15
TableGen/ARM64: print aliases even if they have syntax variants.
Tim Northover
5
-40
/
+47
2014-05-15
ARM64: add correct vector registers during asm parsing
Tim Northover
2
-5
/
+23
2014-05-15
[ARM64] Improve load/store diagnostics and forbid 32-bit register addresses
Bradley Smith
1
-2
/
+11
2014-05-15
[ARM64] Parse fixed vector lanes properly so that diagnostics can be emitted
Bradley Smith
3
-81
/
+92
2014-05-15
[ARM64] Add/Fixup diagnostics for floating point immediates
Bradley Smith
2
-3
/
+18
2014-05-15
[ARM64] Add condition code operand type such that proper diagnostics can be e...
Bradley Smith
4
-32
/
+62
2014-05-15
[ARM64] Add more simple diagnostics for immediate/shift ranges
Bradley Smith
2
-10
/
+25
2014-05-15
[mips][mips64r6] Add addiupc, aluipc, and auipc
Daniel Sanders
7
-4
/
+93
2014-05-15
[mips][mips64r6] Add aui, daui, dahi, and dati
Daniel Sanders
3
-5
/
+59
2014-05-15
[mips][mips64r6] Test that branch likelies are not accepted on MIPS64r6.
Daniel Sanders
1
-2
/
+0
2014-05-15
Fix some dyslexia in an assert message
Jonathan Roelofs
1
-2
/
+2
2014-05-15
Fix typos
Alp Toker
2
-3
/
+3
2014-05-15
[ARM64] Support aggressive fastcc/tailcallopt breaking ABI by popping out arg...
Jiangning Liu
5
-101
/
+377
2014-05-15
Move the TargetMachine MC options to MCTargetOptions. No functional
Eric Christopher
1
-4
/
+0
2014-05-14
Rename ComputeMaskedBits to computeKnownBits. "Masked" has been
Jay Foad
20
-106
/
+106
2014-05-14
ARM-BE: test files for vector argument passing
Christian Pirker
1
-1
/
+2
2014-05-14
[ARM64-BE] Fix byte order of CIE and FDE frames for exception handling
Christian Pirker
1
-0
/
+17
2014-05-14
X86: If we have an instruction that sets a flag and a zero test on the input ...
Benjamin Kramer
1
-3
/
+63
2014-05-14
[mips][mips64r6] Add sel.s and sel.d
Daniel Sanders
2
-4
/
+52
2014-05-14
ARM64: remove unneeded InstPrinter hacks
Tim Northover
1
-32
/
+0
2014-05-14
ARM: implement support for the UDF mnemonic
Saleem Abdulrasool
4
-2
/
+37
2014-05-14
Fix typo in function name.
Eric Christopher
1
-5
/
+5
2014-05-13
R600/SI: Try to fix BFE operands when moving to VALU
Matt Arsenault
1
-1
/
+1
2014-05-13
Save the optimization level the subtarget was created with in a
Eric Christopher
2
-15
/
+14
2014-05-13
ARMEB: Fix byte order of EH frame unwinding instructions, with modified test ...
Christian Pirker
1
-4
/
+14
2014-05-13
Revert "ARMEB: Fix byte order of EH frame unwinding instructions"
Rafael Espindola
1
-14
/
+4
2014-05-13
[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu...
Daniel Sanders
7
-21
/
+35
2014-05-13
ARMEB: Fix byte order of EH frame unwinding instructions
Christian Pirker
1
-4
/
+14
2014-05-13
[mips] Free up two values in SubtargetFeatureFlag by folding the redundant Is...
Daniel Sanders
2
-6
/
+5
2014-05-13
[un]wrap extracted from lib/Target/Target[MachineC].cpp, lib/ExecutionEngine/...
Artyom Skrobov
2
-25
/
+0
2014-05-13
[ARM64] Fix the misleading diagnostic on bad extend amount of reg+reg address...
Kevin Qin
2
-11
/
+8
2014-05-13
Folding into CSEL when there is ZEXT between SETCC and ADD
Weiming Zhao
1
-3
/
+11
2014-05-12
Try to fix an SDAG dependence issue with sret
Reid Kleckner
2
-18
/
+23
2014-05-12
Use cast<> for unchecked use
Matt Arsenault
1
-1
/
+1
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