Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2021-04-20 | intel: Rename gen_device prefix to intel_device | Anuj Phogat | 1 | -1/+1 |
2021-04-02 | intel: Make line wrapping changes due to IS_GFX_VER_BETWEEN | Anuj Phogat | 1 | -3/+6 |
2021-04-02 | intel: Rename IS_GEN* macros to IS_GFX_VER* | Anuj Phogat | 1 | -5/+5 |
2021-04-02 | intel: Rename Genx keyword to Gfxx | Anuj Phogat | 1 | -2/+2 |
2021-04-02 | intel: Rename GEN_GEN macro to GFX_VER | Anuj Phogat | 1 | -20/+20 |
2021-04-02 | intel: Rename GEN_VERSIONx10 macro to GFX_VERx10 | Anuj Phogat | 1 | -6/+6 |
2021-03-16 | intel: Simplify few version checks involving G4X | Anuj Phogat | 1 | -1/+1 |
2021-03-16 | intel: Remove GEN_IS_G4X macro | Anuj Phogat | 1 | -2/+2 |
2021-03-16 | intel: Simplify version checks involving haswell | Anuj Phogat | 1 | -1/+1 |
2021-03-16 | intel: Remove GEN_IS_HASWELL macro | Anuj Phogat | 1 | -2/+2 |
2020-05-20 | i965: store workaround_bo offset | Lionel Landwerlin | 1 | -0/+1 |
2019-03-11 | i965: Reimplement all the PIPE_CONTROL rules. | Kenneth Graunke | 1 | -136/+403 |
2019-03-11 | i965: Use genxml for emitting PIPE_CONTROL. | Kenneth Graunke | 1 | -0/+243 |