diff options
| author | Anuj Phogat <anuj.phogat@gmail.com> | 2021-03-09 14:27:06 -0800 |
|---|---|---|
| committer | Marge Bot <eric+marge@anholt.net> | 2021-03-16 16:40:12 +0000 |
| commit | 1d0295ea2ca92c10e627841d8985fbce26883243 (patch) | |
| tree | 63cadccd6c24204defe315bef285906d1ffafb9f /src/mesa/drivers/dri/i965/genX_pipe_control.c | |
| parent | 97d6ceaf04d6e2fe2c6764f0a6a415f07c956851 (diff) | |
intel: Simplify version checks involving haswell
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9608>
Diffstat (limited to 'src/mesa/drivers/dri/i965/genX_pipe_control.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/genX_pipe_control.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/genX_pipe_control.c b/src/mesa/drivers/dri/i965/genX_pipe_control.c index a6308012b73..55585f548a7 100644 --- a/src/mesa/drivers/dri/i965/genX_pipe_control.c +++ b/src/mesa/drivers/dri/i965/genX_pipe_control.c @@ -407,7 +407,7 @@ genX(emit_raw_pipe_control)(struct brw_context *brw, uint32_t flags, * don't skip the ones with only read-cache-invalidate bits set. This * may or may not be a problem... */ - if (GEN_GEN == 7 && GEN_VERSIONx10 != 75) { + if (GEN_VERSIONx10 == 70) { if (flags & PIPE_CONTROL_CS_STALL) { /* If we're doing a CS stall, reset the counter and carry on. */ brw->pipe_controls_since_last_cs_stall = 0; |