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The Mesa 3D Graphics Library (mirrored from https://gitlab.freedesktop.org/mesa/mesa)
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drivers
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i965
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brw_state_upload.c
Age
Commit message (
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)
Author
Files
Lines
2020-10-15
i965: Remove Gen10-specific state setup and workarounds
Ian Romanick
1
-1
/
+1
2020-10-06
i965: drop likely/unlikely around INTEL_DEBUG
Marcin Ślusarz
1
-3
/
+3
2020-10-01
intel/gen9: Enable MSC RAW Hazard Avoidance
Anuj Phogat
1
-0
/
+2
2020-04-27
mesa: replace _NEW_EVAL with vbo_exec_update_eval_maps
Marek Olšák
1
-1
/
+0
2019-09-23
Revert "intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM"
Kenneth Graunke
1
-5
/
+0
2019-09-11
intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM
Anuj Phogat
1
-0
/
+5
2019-09-06
intel: Stop redirecting state cache to command streamer cache section
Kenneth Graunke
1
-5
/
+0
2019-08-13
i965/gen11: fix genX_bits.h include path
Mauro Rossi
1
-1
/
+1
2019-08-12
i965/gen11: Emit SLICE_HASH_TABLE when pipes are unbalanced.
Rafael Antognolli
1
-0
/
+84
2019-08-12
i965/gen9: Optimize slice and subslice load balancing behavior.
Francisco Jerez
1
-6
/
+3
2019-07-31
intel: add a couple of ASSERTED
Eric Engestrom
1
-1
/
+1
2019-07-29
i965/gen10: Remove unnecessary workaround.
Rafael Antognolli
1
-16
/
+0
2019-07-08
i965: disable repacking for compression for applicable gen
Dongwon Kim
1
-0
/
+9
2019-06-28
Revert "i965/icl: Add WA_2204188704 to disable pixel shader panic dispatch"
Anuj Phogat
1
-6
/
+0
2019-05-04
mesa: Remove the now unused _NEW_ARRAY state change flag.
Mathias Fröhlich
1
-1
/
+0
2019-04-18
i965: implement WaEnableStateCacheRedirectToCS
Lionel Landwerlin
1
-0
/
+5
2019-03-19
i965/icl: Add WA_2204188704 to disable pixel shader panic dispatch
Anuj Phogat
1
-0
/
+6
2018-12-14
i965/gen10+: Enable object level preemption.
Rafael Antognolli
1
-0
/
+27
2018-11-01
i965/icl: Set Error Detection Behavior Control Bit in L3CNTLREG
Anuj Phogat
1
-0
/
+7
2018-09-21
i965/icl: Set Enabled Texel Offset Precision Fix bit
Anuj Phogat
1
-0
/
+7
2018-08-21
i965/icl: Allow headerless sampler messages for pre-emptable contexts
Anuj Phogat
1
-0
/
+11
2018-07-09
i965/icl: Don't set float blend optimization bit in CACHE_MODE_SS
Anuj Phogat
1
-4
/
+0
2018-02-17
i965: Use absolute addressing for constant buffer 0 on Kernel 4.16+.
Kenneth Graunke
1
-0
/
+24
2018-02-15
i965/icl: Enable float blend optimization and Wa3DStateMode
Anuj Phogat
1
-1
/
+1
2018-02-15
i965/icl: Build and use gen11 functions for genxml state-upload and blorp
Anuj Phogat
1
-1
/
+3
2017-11-15
i965: Fold ABO state upload code into the SSBO/UBO state upload code.
Kenneth Graunke
1
-2
/
+1
2017-11-14
i965: Make use of brw_load_register_imm32() helper function
Anuj Phogat
1
-14
/
+8
2017-11-03
i965/gen10: Implement Wa3DStateMode
Anuj Phogat
1
-0
/
+14
2017-11-03
i965/gen10: Enable float blend optimization
Anuj Phogat
1
-0
/
+6
2017-10-31
i965: Add shader cache support for compute
Jordan Justen
1
-1
/
+2
2017-10-31
i965: Add shader cache support for vertex and fragment stages
Timothy Arceri
1
-0
/
+2
2017-10-23
i965: Revert absolute mode for constant buffer pointers.
Kenneth Graunke
1
-24
/
+0
2017-09-26
i965: Convert brw->*_program into a brw->programs[i] array.
Kenneth Graunke
1
-16
/
+20
2017-09-18
i965: rename BRW_NEW_FAST_CLEAR_COLOR to BRW_NEW_AUX_STATE
Iago Toral Quiroga
1
-1
/
+1
2017-09-15
i965: Add an INTEL_DEBUG=reemit option.
Kenneth Graunke
1
-1
/
+1
2017-09-02
i965: Fix state flagging of Gen6 SOL programs.
Kenneth Graunke
1
-3
/
+6
2017-08-30
i965: drop brw->is_broxton
Lionel Landwerlin
1
-1
/
+1
2017-08-30
i965: drop brw->is_haswell in favor of devinfo->is_haswell
Lionel Landwerlin
1
-1
/
+1
2017-08-30
i965: drop brw->is_g4x in favor of devinfo->is_g4x
Lionel Landwerlin
1
-1
/
+1
2017-08-30
i965: drop brw->gen in favor of devinfo->gen
Lionel Landwerlin
1
-14
/
+19
2017-08-23
i965: Make a BRW_NEW_FAST_CLEAR_COLOR dirty bit.
Kenneth Graunke
1
-0
/
+1
2017-08-16
i965: make sure check_and_emit_atom gets inlined
Tapani Pälli
1
-1
/
+1
2017-08-02
i965: Set "Subslice Hashing Mode" to 16x16 on Apollolake.
Kenneth Graunke
1
-0
/
+9
2017-07-20
i965/miptree: Use num_samples of 1 instead of 0 for single-sampled
Topi Pohjolainen
1
-1
/
+2
2017-07-13
i965: Introduce a BRW_NEW_DRAW_CALL dirty bit.
Kenneth Graunke
1
-0
/
+1
2017-07-13
i965: Switch to absolute addressing for constant buffer 0.
Kenneth Graunke
1
-0
/
+24
2017-06-23
i965/cnl: Don't write to Cache Mode Register 1 on gen10+
Anuj Phogat
1
-2
/
+4
2017-06-22
mesa: remove _NEW_BUFFER_OBJECT
Marek Olšák
1
-1
/
+0
2017-06-09
i965/cnl: Handle gen10 in switch cases across the driver
Anuj Phogat
1
-1
/
+3
2017-05-30
i965: Set the "Float Blend Optimization Enable" bit on Gen9+.
Kenneth Graunke
1
-1
/
+3
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