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path: root/src/mesa/drivers/dri/i965/brw_misc_state.c
AgeCommit message (Expand)AuthorFilesLines
2019-08-12i965/gen9: Optimize slice and subslice load balancing behavior.Francisco Jerez1-0/+90
2019-08-08i965: Emit a dummy MEDIA_VFE_STATE before switching from GPGPU to 3DDanylo Piliaiev1-0/+21
2019-04-14intel: Emit 3DSTATE_VF_STATISTICS dynamicallyKenneth Graunke1-6/+0
2018-10-11i965/gen10+: Initialize new fields in STATE_BASE_ADDRESSJordan Justen1-1/+6
2018-09-26intel/isl: Add a unit suffixes to some struct fields and variablesJason Ekstrand1-1/+1
2018-07-19i965/misc: Use depth/stencil surf's tiling on gen4-5Nanley Chery1-1/+3
2018-05-22i965: Remove ring switching entirelyJason Ekstrand1-1/+1
2018-05-08i965: Simplify brw_emit_depthbuffer and brw_emit_depth_stencil_hizJason Ekstrand1-81/+26
2018-05-08i965: Move brw_emit_depth_stencil_hiz higher up in the fileJason Ekstrand1-50/+40
2018-05-08i965: Use ISL for emitting depth/stencil/hiz state on gen6+Jason Ekstrand1-18/+129
2018-05-08i965: Use the brw_depthbuffer atom on all gensJason Ekstrand1-1/+2
2018-03-27i965: Drop PIPE_CONTROL_NO_WRITE from various calls.Kenneth Graunke1-3/+1
2018-03-01i965: Allow 48-bit addressing on Gen8+.Kenneth Graunke1-4/+9
2018-02-28Revert "i965: Only emit 3DSTATE_DRAWING_RECTANGLE once on gen8+"Mark Janes1-9/+0
2018-02-28i965: Only emit 3DSTATE_DRAWING_RECTANGLE once on gen8+Jason Ekstrand1-0/+9
2018-01-09intel: Apply Geminilake "Barrier Mode" workaround.Kenneth Graunke1-0/+15
2017-11-29i965: Reorganize batch/state BO fields into a 'brw_growing_bo' struct.Kenneth Graunke1-12/+12
2017-11-29i965: Program the dynamic state heap size to MAX_STATE_SIZE.Kenneth Graunke1-1/+1
2017-11-16i965: Upload invariant state once at the start of the batch on Gen4-5.Kenneth Graunke1-9/+0
2017-11-13i965: Add more precise cache tracking helpersJason Ekstrand1-2/+2
2017-09-14i965: Use a separate state buffer, but avoid changing flushing behavior.Kenneth Graunke1-13/+13
2017-08-30i965: drop brw->has_surface_tile_offset in favor of devinfo'sLionel Landwerlin1-1/+2
2017-08-30i965: drop brw->is_haswell in favor of devinfo->is_haswellLionel Landwerlin1-1/+1
2017-08-30i965: drop brw->is_g4x in favor of devinfo->is_g4xLionel Landwerlin1-4/+4
2017-08-30i965: drop brw->gen in favor of devinfo->genLionel Landwerlin1-27/+36
2017-08-04i965: Reduce passing 2x32b of reloc_domains to 2 bitsChris Wilson1-33/+18
2017-07-20i965: Drop redundant check for non-tiled depth bufferTopi Pohjolainen1-2/+1
2017-07-20i965/miptree: Switch to isl_surf::row_pitchTopi Pohjolainen1-1/+1
2017-07-20i965/miptree: Switch to isl_surf::tilingTopi Pohjolainen1-4/+4
2017-07-18i965/gen4: Set tile offsets to zero after depth rebaseTopi Pohjolainen1-4/+6
2017-06-19i965/gen4: Add support for single layer in alignment workaroundTopi Pohjolainen1-2/+2
2017-06-18i965/gen4: Refactor depth/stencil rebaseTopi Pohjolainen1-180/+63
2017-06-18i965: Drop depth/stencil miptree pointers in alignment workaroundTopi Pohjolainen1-12/+3
2017-06-18i965/gen4: Simplify depth/stencil invalidate checkTopi Pohjolainen1-13/+3
2017-06-18i965/gen4: Remove redundant check for depth when rebasing stencilTopi Pohjolainen1-51/+12
2017-06-18i965/gen4: Remove non-existing stencil and hiz buffer setupTopi Pohjolainen1-115/+10
2017-06-17i965/gen4: Set depth offset when there is stencil attachment onlyTopi Pohjolainen1-0/+6
2017-06-14i965: Do an end-of-pipe sync prior to STATE_BASE_ADDRESSJason Ekstrand1-6/+12
2017-06-14i965: Flush around state base addressJason Ekstrand1-0/+32
2017-06-07i965/miptree: Store fast clear colors in an isl_color_valueJason Ekstrand1-1/+22
2017-05-03i965: Port gen4+ state emitting code to genxml.Rafael Antognolli1-147/+0
2017-03-27i965: Delete tile resource mode codeAnuj Phogat1-2/+1
2017-03-16i965/gen8+: Do full stall when switching pipelineTopi Pohjolainen1-1/+2
2017-03-13i965: Move the back-end compiler to src/intel/compilerJason Ekstrand1-1/+1
2017-03-13i965: split EU defines to brw_eu_defines.hEmil Velikov1-0/+1
2017-03-06i965: Delete vestiges of resource streamer code.Kenneth Graunke1-40/+0
2017-01-27i965/gen6: Simplify hiz surface setupTopi Pohjolainen1-3/+2
2017-01-27i965: Remove check for hiz on earlier gens than SNBTopi Pohjolainen1-16/+2
2016-10-31i965: Program 3DSTATE_AA_LINE_PARAMETERS in upload_invariant_stateNanley Chery1-31/+10
2016-10-27i965/miptree: Remove the stencil_as_y_tiled parameter from get_aligned_offsetJason Ekstrand1-4/+2
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