summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/i965/brw_blorp.h
AgeCommit message (Collapse)AuthorFilesLines
2021-04-02intel: Rename genx keyword to gfxx in source filesAnuj Phogat1-9/+9
Commands used to do the changes: export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965" grep -E "gen[[:digit:]]+" -rIl $SEARCH_PATH | xargs sed -ie "s/gen\([[:digit:]]\+\)/gfx\1/g" Exclude pack.h and xml changes in this patch: grep -E "gfx[[:digit:]]+_pack\.h" -rIl $SEARCH_PATH | xargs sed -ie "s/gfx\([[:digit:]]\+_pack\.h\)/gen\1/g" grep -E "gfx[[:digit:]]+\.xml" -rIl $SEARCH_PATH | xargs sed -ie "s/gfx\([[:digit:]]\+\.xml\)/gen\1/g" Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
2021-03-11i965: Rename files with "intel_" prefix to "brw_"Anuj Phogat1-1/+1
v2: Rename intel_batchbuffer.c to intel_batch.c and intel_batchbuffer.h to intel_batch.h Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9510>
2021-02-25i965: Rename the rest of intel_* functions to brw_*Kenneth Graunke1-3/+3
Acked-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9207>
2021-02-25i965: Rename intel_mip* to brw_mip*.Kenneth Graunke1-9/+9
With lots of indentation fixes. Acked-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9207>
2020-11-02i965: remove prototypes of not-existing functionsMarcin Ślusarz1-2/+0
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7353>
2018-02-15i965/icl: Build and use gen11 functions for genxml state-upload and blorpAnuj Phogat1-0/+2
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-02-08intel/blorp: Use isl_aux_op instead of blorp_hiz_opJason Ekstrand1-1/+1
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2018-02-08intel/blorp: Use isl_aux_op instead of blorp_fast_clear_opJason Ekstrand1-1/+1
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2017-10-12i965: Add blorp-based texture upload and download pathsJason Ekstrand1-0/+20
v1 (Topi Pohjolainen): original patch. v2 (Topi Pohjolainen): - Fix return value (s/MESA_FORMAT_NONE/false/) (Anuj) - Move _mesa_tex_format_from_format_and_type() just in the end avoiding additional if-block (Anuj) - Explain better the array alignment restriction (Anuj) - Do not bail out in case of gl_pixelstore_attrib::ImageHeight, it is handled by _mesa_image_offset() automatically (Ken). - Support 1D_ARRAY by flipping depth, width and y, z (Ken). v3 (Topi Pohjolainen): - Contrary to v2, do not try to handle gl_pixelstore_attrib::ImageHeight. Currently there are no tests in piglit or cts for it. One could possibly copy or modify tests/texturing/texsubimage.c. There, however, seems to be number of corner cases to consider. Moreover, current meta path applies the packing height for both source and targets when determining the offset. This would probably require re-visiting also. v4 (Topi Pohjolainen): Rebased on top of merged drm-bacon v5 (Jason Ekstrand): - Move to brw_blorp.c - Significant refactoring - Fixed 1-D array textures - Simplified handling of PBOs vs. CPU data. - Handle gl_pixelstore_attrib::ImageHeight. It turns out there are piglit tests that cover this. The original version was failing them because of an error in the way it handled 1-D array textures. - Add support for texture download v6 (Kenneth Graunke): Rebase fixes: - Use intel_miptree_check_level_layer instead of deleted fields - Update for mesa_format_supports_render[] rename. - Pass 'false' (read-only) to intel_bufferobj_buffer v7 (Kenneth Graunke): - Fix brw_blorp_download_miptree to pass 'false' (not read only) for the destination buffer (caught by Chris Wilson). - Fix blorp_get_client_bo to pass intel_bufferobj_buffer !read_only for the 'writable' parameter instead of 'false' (caught by Jason). - Support GL_BGR, GL_BGRA, GL_BGRA_INTEGER, GL_BGR_INTEGER, allowing us to use this for ReadPixels on the window system buffer (caught by Chris Wilson). - Fix y-flipping bugs in download path (exposed by BGRA support). - Fix false vs. NULL return value in blorp_get_client_bo. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-08-30i965: Add a brw_blorp_copy_buffers() command.Kenneth Graunke1-0/+8
This exposes the new blorp_copy_buffer() functionality to i965. It should be a drop-in replacement for intel_emit_linear_blit() (other than the arguments being backwards, for consistency with BLORP). Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-07-22i965/miptree: Add support for partially resolving MCSJason Ekstrand1-0/+5
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-20i965: Fall back to normal blorp clear instead of meta clearIan Romanick1-1/+1
When intel_miptree_alloc_non_msrt_mcs fails, fall back to normal blorp color clear instead of falling back to meta. With this change, brw_blorp_clear_color can never fail. v2: Combine two if-statements to remove a level of indentation. Suggested by Jason. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-14i965: Use blorp for depth/stencil clears on gen6+Jason Ekstrand1-0/+4
Acked-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-09i965/cnl: Add gen10 specific function declarationsAnuj Phogat1-0/+2
These declarations will help the code start compiling once we wire up the makefiles for gen10. Later patches will start using these functions for gen10. Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-07i965/blorp: Take an explicit fast clear op in resolve_colorJason Ekstrand1-1/+2
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Chad Versace <chadversary@chromium.org>
2017-06-07i965/blorp: Take a layer range in intel_hiz_execJason Ekstrand1-1/+2
Cc: "17.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-05-26i965: Add blorp support for gen4-5Jason Ekstrand1-0/+6
Due to complications with things such as URB setup on gen4-5, it's easier to keep gen4 support in blorp completely internal to i965. This makes things a bit awkward because that means there's a file in i965 that includes blorp_priv.h but it's either that or have a file in blorp that includes brw_context.h. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-03-22i965: consistently use ifndef guards over pragma onceEmil Velikov1-1/+4
The only remaining case is the brw_oa.py generator which pipes the generated file to stdout. That will be resolved with later commits. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Vedran Miletić <vedran@miletic.net> Acked-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2016-11-25i965: Provide slice details to color resolverTopi Pohjolainen1-1/+2
v2: Make intel_miptree_resolve_color() take start layer and layer count. Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12i965/blorp: Add a copy_miptrees helperJason Ekstrand1-0/+10
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-08-29i965: Move blorp into src/intel/blorpJason Ekstrand1-1/+1
At this point, blorp is completely driver agnostic and can be safely moved into its own folder. Soon, we hope to start using it for doing blits in the Vulkan driver. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-29i965/blorp: Remove the remaining brw prefixes from the blorp.h APIJason Ekstrand1-5/+5
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-29i965: Move the hiz_op enum to blorpJason Ekstrand1-1/+1
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-29i965/blorp: Add an "exec" function pointer to blorp_contextJason Ekstrand1-0/+11
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-29i965/blorp: Add a blorp_context struct and init/finish funcsJason Ekstrand1-0/+2
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965: Split brw_blorp.c/h into multiple filesJason Ekstrand1-408/+6
This mega-commit pulls most of the i965-specific bits of blorp into the brw_blorp.c/h files which now contain nothing but i965 wrappers around "core blorp" calls. The "core blorp" api is moved into blorp.h and the internal blorp data structures are moved into blorp_priv.h. The new file blorp.c is created to house "core blorp" internals which are pulled from the old brw_blorp.c Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Make the guts of brw_blorp_blit_miptrees miptree-unawareJason Ekstrand1-0/+14
Now that we have the brw_blorp_surf struct, we can start to make bits of blorp completely miptree-unaware. To start things off, we split the guts of brw_blorp_blit_miptrees into a brw_blorp_blit function which knows nothing about miptrees. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Add a new brw_blorp_surf intermediate structJason Ekstrand1-2/+28
At the moment, this seems to make all of the interfaces messier rather than clener. However, it does provide a representation of a surface that simultaneously contains everything and is completely unaware of miptrees. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Do gen6 stencil offsets up-frontJason Ekstrand1-6/+0
This keeps all of the nastyness of gen6 stencil on the i965 side of the API line and lets us delete that nasty hand-rolled ISL-based offset path that we were using for ALL_SLICES_AT_EACH_LOD. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Set up HiZ surfaces up-frontJason Ekstrand1-2/+0
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i964/blorp: Set up most aux surfaces up-frontJason Ekstrand1-0/+4
This commit also adds support for an offset for aux surfaces. In GL, this only gets used for HiZ on SNB at the moment. However, in Vulkan, all aux surfaces are at a non-zero offset and that is likely to happen in GL eventually. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Stop using the miptree in state setup for tex/rt surfacesJason Ekstrand1-1/+2
This commit movies us from a miptree model to a surf+bo+offset model. In the GL driver, miptrees are almost always at the start of the bo so the offset is zero but we don't want to always make that assumption. In the sort term, gen6 stencil and HiZ will be at an offset but, in the long term, any Vulkan surface is liable to be at a non-zero offset. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Remove unused fields from blorp_surface_infoJason Ekstrand1-16/+0
The only reason why we need layer or level is that we need the z-offset for 3-D surfaces. Let's just have the one field for that. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Only do offset hacks for fake W-tiling and IMSJason Ekstrand1-0/+6
Since the dawn of time, blorp has used offsets directly to get at different mip levels and array slices of surfaces. This isn't really necessary since we can just use the base level/layer provided in the surface state. While it may have simplified blorp's original design, we haven't been using the blorp path for surface state on gen8 thanks to render compression and there's really no good need for it most of the time. This commit restricts such surface munging to the cases of fake W-tiling and fake interleaved multisampling. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Add a z_offset field to blorp_surface_infoJason Ekstrand1-0/+3
The layer field is in terms of physical layers which isn't quite what the sampler will want for 2-D MS array textures. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Get rid of brw_blorp_surface_info::width/heightJason Ekstrand1-12/+0
Instead, we manually mutate the surface size as needed. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Add an isl_view to blorp_surface_infoJason Ekstrand1-14/+2
Eventually, this will be the actual view that gets passed into isl to create the surface state. For now, we just use it for the format and the swizzle. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Move intratile offset calculations out of surface state setupJason Ekstrand1-13/+2
Previously we multiplied full x/y offsets, resolved tile aligned buffer offset and intra tile offset based on that. Now we let ISL to take into account the msaa setting and we only multiply the resolved intra tile offsets. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Get rid of brw_blorp_surface_info::array_layoutJason Ekstrand1-9/+0
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Use isl_msaa_layout instead of intel_msaa_layoutJason Ekstrand1-10/+4
We also remove brw_blorp_surface_info::msaa_layout. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Use the ISL aux_layout for deciding whether to do an MCS fetchJason Ekstrand1-0/+2
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Get rid of brw_blorp_surface_info::num_samplesJason Ekstrand1-2/+0
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Get rid of brw_blorp_surface_info::map_stencil_as_y_tiledJason Ekstrand1-15/+0
Now that we're carrying around the isl_surf, we can just modify it directly instead of passing an extra bit around. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Remove compute_tile_offsetsJason Ekstrand1-5/+0
We have a handy little function is ISL that does exactly the same thing. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-08-17i965/blorp: Create the isl_surf up-frontJason Ekstrand1-0/+5
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-07-15i965/blorp: Add a generic ISL-based surface state emit pathJason Ekstrand1-0/+6
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-05i965: Remove trailing whitespaceIago Toral Quiroga1-1/+1
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-07-05i965: Make inline function staticIago Toral Quiroga1-1/+1
Without this the i965 driver fails to load. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-07-04i965/blorp: Remove support for push constantsTopi Pohjolainen1-15/+0
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-04i965/blorp: Fix the size requirement for vertex elementsTopi Pohjolainen1-1/+2
v2: Rebased as this is needed before flat inputs are enabled Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-25 12:42:12 +0000