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path: root/src/amd/compiler/aco_instruction_selection_setup.cpp
AgeCommit message (Expand)AuthorFilesLines
2024-04-08nir,aco: add test intrinsicsRhys Perry1-2/+4
2024-04-08aco: ensure loop exits exist in NIRRhys Perry1-0/+18
2024-04-08aco: remove unreachable merge blocksRhys Perry1-40/+14
2024-04-08aco: use SPDX-License-IdentifierSamuel Pitoiset1-19/+1
2024-04-05aco: implement mqsad_4x8 and shfrRhys Perry1-0/+1
2024-03-22nir: rename AMD XFB intrinsics to *_gfx11_amdMarek Olšák1-1/+1
2024-03-07aco: Only fix used variables to registersKonstantin Seurer1-0/+2
2024-02-17radv: Remove ray_launch_size_addr_amd system value.Bas Nieuwenhuizen1-1/+0
2024-01-24aco: implement rotateGeorg Lehmann1-0/+1
2024-01-19aco: implement as_uniform and ballot_relaxedGeorg Lehmann1-0/+2
2024-01-05nir: remove sad_u8x4Rhys Perry1-1/+0
2024-01-05aco: implement msad_4x8Rhys Perry1-0/+1
2024-01-05aco: correctly set min/max_subgroup_size for wave32-as-wave64Rhys Perry1-6/+2
2023-11-17aco: remove useless nir_intrinsic_load_force_vrs_rates_amdSamuel Pitoiset1-1/+0
2023-10-24aco: Add WMMA instructions.Bas Nieuwenhuizen1-1/+2
2023-10-10nir: Use getters for nir_src::parent_*Alyssa Rosenzweig1-4/+4
2023-10-10aco,radv,radeonsi: pass spi ps input ena and addrQiang Yu1-2/+2
2023-08-31aco: pass sw_stage when setup_isel_contextQiang Yu1-12/+1
2023-08-31aco: simplify setup_tcs_infoQiang Yu1-5/+2
2023-08-25aco: add support for compiling {VS,TES}+GS separately on GFX9+Samuel Pitoiset1-1/+1
2023-08-15nir: Rename nir_instr_type_ssa_undef to nir_instr_type_undefFaith Ekstrand1-4/+4
2023-08-14nir: Drop nir_destFaith Ekstrand1-19/+18
2023-08-14nir: Drop nir_alu_destFaith Ekstrand1-7/+6
2023-08-14nir: Get rid of nir_dest_is_divergent()Faith Ekstrand1-4/+4
2023-08-12nir: Drop "SSA" from NIR languageAlyssa Rosenzweig1-8/+8
2023-08-02aco: add infra for compiling TCS epilogsSamuel Pitoiset1-2/+7
2023-07-12aco: Add MESA_SHADER_KERNEL to instruction selection setup.Timur Kristóf1-0/+1
2023-07-03aco: remove 64-bit integer conversion opcodesRhys Perry1-3/+0
2023-06-30aco,ac/llvm,ac/nir,vtn: unify cube opcodesRhys Perry1-2/+1
2023-06-23aco: Drop NIR parallel copy handlingAlyssa Rosenzweig1-6/+0
2023-06-23aco: Use aco_shader_info::hw_stage instead of guessing.Timur Kristóf1-45/+1
2023-06-23aco: Use ac_hw_stage instead of aco-specific HWStage.Timur Kristóf1-20/+20
2023-06-16aco: reformat according to its .clang-formatEric Engestrom1-2/+2
2023-06-09aco: run nir_lower_int64 after nir_opt_uniform_atomicsRhys Perry1-1/+2
2023-06-02aco: implement two load lds ngg intrininsic for radeonsiQiang Yu1-0/+2
2023-05-31aco: remove nir_intrinsic_load_barycentric_at_sample occurencesSamuel Pitoiset1-1/+0
2023-05-25aco: implement strict_wqm_coord_amdRhys Perry1-0/+7
2023-05-12aco,radv: Use unified atomicsAlyssa Rosenzweig1-54/+8
2023-04-19aco: use apply_nuw_to_ssa() with load_smem_amdRhys Perry1-1/+2
2023-04-19aco: implement nir_bindless_image_atomic_inc/dec_wrapQiang Yu1-0/+2
2023-04-12aco: Remove setup_*_variables and add setup_lds_size instead.Timur Kristóf1-77/+8
2023-04-12ac, aco, radv: Clarify LDS size on GFX6, and NGG shaders.Timur Kristóf1-5/+0
2023-03-16aco: implement load_ray_launch_{id|size}Daniel Schürmann1-0/+2
2023-03-16aco: move rt_dynamic_callable_stack_base_amd to VGPRDaniel Schürmann1-0/+1
2023-03-16aco: add RT stage enumsDaniel Schürmann1-1/+15
2023-03-15aco, radv: Remove VS IO information from ACO.Timur Kristóf1-42/+0
2023-03-15aco: Implement load_typed_buffer_amd.Timur Kristóf1-0/+1
2023-03-08aco: Don't include headers from radv.Timur Kristóf1-2/+1
2023-03-08aco, radv: Don't use radv_shader_args in aco.Timur Kristóf1-1/+1
2023-02-22amd,nir: remove byte_permute_amd intrinsicGeorg Lehmann1-1/+0