i965: Move and rename "wm sampler" fields to just "sampler".

brw_wm_samplers actually enables any active samplers regardless of what
pipeline stage is using them, so it doesn't make much sense for it to be
WM-specific.  So, rename it to "brw_samplers."

To properly generalize it, move sampler_count and sampler_offset from
brw_context::wm to a new brw_context::sampler that can be shared without
looking strange.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

9 files changed, 37 insertions, 33 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 5d70345e668..fb03208c627 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -745,6 +745,12 @@ struct brw_context
       uint32_t surf_offset[BRW_MAX_SURFACES];
    } bind;
 
+   /** SAMPLER_STATE count and offset */
+   struct {
+      GLuint count;
+      uint32_t offset;
+   } sampler;
+
    struct {
       struct brw_vs_prog_data *prog_data;
       int8_t *constant_map; /* variable array following prog_data */
@@ -827,9 +833,6 @@ struct brw_context
 
       drm_intel_bo *scratch_bo;
 
-      GLuint sampler_count;
-      uint32_t sampler_offset;
-
       /** Offset in the program cache to the WM program */
       uint32_t prog_offset;
 
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 44f5fe1626d..f004633c27e 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -57,6 +57,7 @@ extern const struct brw_tracked_state brw_polygon_stipple_offset;
 extern const struct brw_tracked_state brw_polygon_stipple;
 extern const struct brw_tracked_state brw_program_parameters;
 extern const struct brw_tracked_state brw_recalculate_urb_fence;
+extern const struct brw_tracked_state brw_samplers;
 extern const struct brw_tracked_state brw_sf_prog;
 extern const struct brw_tracked_state brw_sf_unit;
 extern const struct brw_tracked_state brw_sf_vp;
@@ -67,7 +68,6 @@ extern const struct brw_tracked_state brw_vs_prog;
 extern const struct brw_tracked_state brw_vs_unit;
 extern const struct brw_tracked_state brw_wm_input_sizes;
 extern const struct brw_tracked_state brw_wm_prog;
-extern const struct brw_tracked_state brw_wm_samplers;
 extern const struct brw_tracked_state brw_renderbuffer_surfaces;
 extern const struct brw_tracked_state brw_texture_surfaces;
 extern const struct brw_tracked_state brw_binding_table;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index fe4aed0db09..5a323e0fbb6 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -70,7 +70,8 @@ static const struct brw_tracked_state *gen4_atoms[] =
    &brw_renderbuffer_surfaces,  /* must do before unit */
    &brw_texture_surfaces,       /* must do before unit */
    &brw_binding_table,
-   &brw_wm_samplers,
+
+   &brw_samplers,
 
    /* These set up state for brw_psp_urb_cbs */
    &brw_wm_unit,
@@ -144,7 +145,7 @@ static const struct brw_tracked_state *gen6_atoms[] =
    &brw_texture_surfaces,       /* must do before unit */
    &brw_binding_table,
 
-   &brw_wm_samplers,
+   &brw_samplers,
    &gen6_sampler_state,
 
    &gen6_vs_state,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
index 6104afcf46e..9f13299f415 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
@@ -306,7 +306,7 @@ static void brw_update_sampler_state(struct brw_context *brw,
 					    brw->wm.sdc_offset[unit]) >> 5;
 
       drm_intel_bo_emit_reloc(intel->batch.bo,
-			      brw->wm.sampler_offset +
+			      brw->sampler.offset +
 			      unit * sizeof(struct brw_sampler_state) +
 			      offsetof(struct brw_sampler_state, ss2),
 			      intel->batch.bo, brw->wm.sdc_offset[unit],
@@ -329,27 +329,27 @@ static void brw_update_sampler_state(struct brw_context *brw,
  * FIXME: simplify all the different new texture state flags.
  */
 static void
-brw_upload_wm_samplers(struct brw_context *brw)
+brw_upload_samplers(struct brw_context *brw)
 {
    struct gl_context *ctx = &brw->intel.ctx;
    struct brw_sampler_state *samplers;
    int i;
 
-   brw->wm.sampler_count = 0;
+   brw->sampler.count = 0;
    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
       if (ctx->Texture.Unit[i]._ReallyEnabled)
-	 brw->wm.sampler_count = i + 1;
+	 brw->sampler.count = i + 1;
    }
 
-   if (brw->wm.sampler_count == 0)
+   if (brw->sampler.count == 0)
       return;
 
    samplers = brw_state_batch(brw, AUB_TRACE_SAMPLER_STATE,
-			      brw->wm.sampler_count * sizeof(*samplers),
-			      32, &brw->wm.sampler_offset);
-   memset(samplers, 0, brw->wm.sampler_count * sizeof(*samplers));
+			      brw->sampler.count * sizeof(*samplers),
+			      32, &brw->sampler.offset);
+   memset(samplers, 0, brw->sampler.count * sizeof(*samplers));
 
-   for (i = 0; i < brw->wm.sampler_count; i++) {
+   for (i = 0; i < brw->sampler.count; i++) {
       if (ctx->Texture.Unit[i]._ReallyEnabled)
 	 brw_update_sampler_state(brw, i, &samplers[i]);
    }
@@ -357,13 +357,13 @@ brw_upload_wm_samplers(struct brw_context *brw)
    brw->state.dirty.cache |= CACHE_NEW_SAMPLER;
 }
 
-const struct brw_tracked_state brw_wm_samplers = {
+const struct brw_tracked_state brw_samplers = {
    .dirty = {
       .mesa = _NEW_TEXTURE,
       .brw = BRW_NEW_BATCH,
       .cache = 0
    },
-   .emit = brw_upload_wm_samplers,
+   .emit = brw_upload_samplers,
 };
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c
index 69d7a769e54..e1791c20ea7 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_state.c
@@ -137,13 +137,13 @@ brw_upload_wm_unit(struct brw_context *brw)
       wm->wm4.sampler_count = 0; /* hardware requirement */
    else {
       /* CACHE_NEW_SAMPLER */
-      wm->wm4.sampler_count = (brw->wm.sampler_count + 1) / 4;
+      wm->wm4.sampler_count = (brw->sampler.count + 1) / 4;
    }
 
-   if (brw->wm.sampler_count) {
+   if (brw->sampler.count) {
       /* reloc */
       wm->wm4.sampler_state_pointer = (intel->batch.bo->offset +
-				       brw->wm.sampler_offset) >> 5;
+				       brw->sampler.offset) >> 5;
    } else {
       wm->wm4.sampler_state_pointer = 0;
    }
@@ -233,11 +233,11 @@ brw_upload_wm_unit(struct brw_context *brw)
    }
 
    /* Emit sampler state relocation */
-   if (brw->wm.sampler_count != 0) {
+   if (brw->sampler.count != 0) {
       drm_intel_bo_emit_reloc(intel->batch.bo,
 			      brw->wm.state_offset +
 			      offsetof(struct brw_wm_unit_state, wm4),
-			      intel->batch.bo, (brw->wm.sampler_offset |
+			      intel->batch.bo, (brw->sampler.offset |
 						wm->wm4.stats_enable |
 						(wm->wm4.sampler_count << 2)),
 			      I915_GEM_DOMAIN_INSTRUCTION, 0);
diff --git a/src/mesa/drivers/dri/i965/gen6_sampler_state.c b/src/mesa/drivers/dri/i965/gen6_sampler_state.c
index 89326872faa..15cae0a79db 100644
--- a/src/mesa/drivers/dri/i965/gen6_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sampler_state.c
@@ -43,7 +43,7 @@ upload_sampler_state_pointers(struct brw_context *brw)
 	     (4 - 2));
    OUT_BATCH(0); /* VS */
    OUT_BATCH(0); /* GS */
-   OUT_BATCH(brw->wm.sampler_offset);
+   OUT_BATCH(brw->sampler.offset);
    ADVANCE_BATCH();
 }
 
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 73036b4cd5e..271a9aeca78 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -141,7 +141,7 @@ upload_wm_state(struct brw_context *brw)
       dw2 |= GEN6_WM_FLOATING_POINT_MODE_ALT;
 
    /* CACHE_NEW_SAMPLER */
-   dw2 |= (ALIGN(brw->wm.sampler_count, 4) / 4) << GEN6_WM_SAMPLER_COUNT_SHIFT;
+   dw2 |= (ALIGN(brw->sampler.count, 4) / 4) << GEN6_WM_SAMPLER_COUNT_SHIFT;
    dw4 |= (brw->wm.prog_data->first_curbe_grf <<
 	   GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
    dw4 |= (brw->wm.prog_data->first_curbe_grf_16 <<
diff --git a/src/mesa/drivers/dri/i965/gen7_sampler_state.c b/src/mesa/drivers/dri/i965/gen7_sampler_state.c
index 9b52e8dfd39..d2699a15911 100644
--- a/src/mesa/drivers/dri/i965/gen7_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sampler_state.c
@@ -190,21 +190,21 @@ gen7_upload_samplers(struct brw_context *brw)
    struct gen7_sampler_state *samplers;
    int i;
 
-   brw->wm.sampler_count = 0;
+   brw->sampler.count = 0;
    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
       if (ctx->Texture.Unit[i]._ReallyEnabled)
-	 brw->wm.sampler_count = i + 1;
+	 brw->sampler.count = i + 1;
    }
 
-   if (brw->wm.sampler_count == 0)
+   if (brw->sampler.count == 0)
       return;
 
    samplers = brw_state_batch(brw, AUB_TRACE_SAMPLER_STATE,
-			      brw->wm.sampler_count * sizeof(*samplers),
-			      32, &brw->wm.sampler_offset);
-   memset(samplers, 0, brw->wm.sampler_count * sizeof(*samplers));
+			      brw->sampler.count * sizeof(*samplers),
+			      32, &brw->sampler.offset);
+   memset(samplers, 0, brw->sampler.count * sizeof(*samplers));
 
-   for (i = 0; i < brw->wm.sampler_count; i++) {
+   for (i = 0; i < brw->sampler.count; i++) {
       if (ctx->Texture.Unit[i]._ReallyEnabled)
 	 gen7_update_sampler_state(brw, i, &samplers[i]);
    }
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index 97c079a2be8..f38d2f1155f 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -110,7 +110,7 @@ upload_ps_state(struct brw_context *brw)
    /* CACHE_NEW_SAMPLER */
    BEGIN_BATCH(2);
    OUT_BATCH(_3DSTATE_SAMPLER_STATE_POINTERS_PS << 16 | (2 - 2));
-   OUT_BATCH(brw->wm.sampler_offset);
+   OUT_BATCH(brw->sampler.offset);
    ADVANCE_BATCH();
 
    /* CACHE_NEW_WM_PROG */
@@ -144,7 +144,7 @@ upload_ps_state(struct brw_context *brw)
 
    dw2 = dw4 = dw5 = 0;
 
-   dw2 |= (ALIGN(brw->wm.sampler_count, 4) / 4) << GEN7_PS_SAMPLER_COUNT_SHIFT;
+   dw2 |= (ALIGN(brw->sampler.count, 4) / 4) << GEN7_PS_SAMPLER_COUNT_SHIFT;
 
    /* Use ALT floating point mode for ARB fragment programs, because they
     * require 0^0 == 1.