diff options
| author | Kenneth Graunke <kenneth@whitecape.org> | 2018-04-10 01:18:25 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2018-06-06 19:45:09 -0700 |
| commit | a363bb2cd0e2a141f2c60be005009703bffcbe4e (patch) | |
| tree | ebeb03e02ff36e57faa7e688ce58a07bbc349165 /src/mesa | |
| parent | 74259b98aab010d3062c5903770dc3067665b59e (diff) | |
i965: Allocate VMA in userspace for full-PPGTT systems.
This patch enables soft-pinning of all buffers, allowing us to skip
relocation processing entirely. All systems with full PPGTT and > 4GB
of VMA should gain these benefits. This should be most Gen8+.
Unfortunately, this excludes a few systems:
- Cherryview (only has 32-bit addressing, despite 48-bit pointers)
- Broadwell with a 32-bit kernel
- Anybody running pre-4.5 kernel.
We may enable it for Cherryview in the future, but it would require
some tweaks to the memory zone.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_bufmgr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c index 121e952b9ed..b5e3eb6bff9 100644 --- a/src/mesa/drivers/dri/i965/brw_bufmgr.c +++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c @@ -1724,7 +1724,7 @@ brw_bufmgr_init(struct gen_device_info *devinfo, int fd) bufmgr->initial_kflags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS; /* Allocate VMA in userspace if we have softpin and full PPGTT. */ - if (false && gem_param(fd, I915_PARAM_HAS_EXEC_SOFTPIN) > 0 && + if (gem_param(fd, I915_PARAM_HAS_EXEC_SOFTPIN) > 0 && gem_param(fd, I915_PARAM_HAS_ALIASING_PPGTT) > 1) { bufmgr->initial_kflags |= EXEC_OBJECT_PINNED; |