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authorMatt Turner <mattst88@gmail.com>2013-11-28 21:33:05 -0800
committerMatt Turner <mattst88@gmail.com>2013-12-04 20:05:41 -0800
commit2eb9bbfb6889a7a2f864aa110134f75fc224edee (patch)
tree1833fe9ffeeb83709a4e9e2b4cbb6163e11440bb /src/mesa
parented85c0f409116b42f032d0e7939d4ea55d3ca2f3 (diff)
i965/cfg: Rework to make IF & ELSE blocks flow into ENDIF.
Previously we made the basic block following an ENDIF instruction a successor of the basic blocks ending with IF and ELSE. The PRM says that IF and ELSE instructions jump *to* the ENDIF, rather than over it. This should be immaterial to dataflow analysis, except for if, break, endif sequences: START B1 <-B0 <-B9 0x00000100: cmp.g.f0(8) null g15<8,8,1>F g4<0,1,0>F 0x00000110: (+f0) if(8) 0 0 null 0x00000000UD END B1 ->B2 ->B4 START B2 <-B1 break 0x00000120: break(8) 0 0 null 0D END B2 ->B10 START B3 0x00000130: endif(8) 2 null 0x00000002UD END B3 ->B4 The ENDIF block would have no parents, so dataflow analysis would generate incorrect results, preventing copy propagation from eliminating some instructions. This patch changes the CFG to make ENDIF start rather than end basic blocks, so that it can be the jump target of the IF and ELSE instructions. It helps three programs (including two fs8/fs16 pairs). total instructions in shared programs: 1561126 -> 1561060 (-0.00%) instructions in affected programs: 837 -> 771 (-7.89%) More importantly, it allows copy propagation to handle more cases. Disabling the register_coalesce() pass before this patch hurts 58 programs, while afterward it only hurts 11 programs. Reviewed-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_cfg.cpp36
-rw-r--r--src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp4
2 files changed, 25 insertions, 15 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_cfg.cpp b/src/mesa/drivers/dri/i965/brw_cfg.cpp
index 548b45899b2..9dffa63ef4d 100644
--- a/src/mesa/drivers/dri/i965/brw_cfg.cpp
+++ b/src/mesa/drivers/dri/i965/brw_cfg.cpp
@@ -133,10 +133,7 @@ cfg_t::create(void *parent_mem_ctx, exec_list *instructions)
cur_if = cur;
cur_else = NULL;
- /* Set up the block just after the endif. Don't know when exactly
- * it will start, yet.
- */
- cur_endif = new_block();
+ cur_endif = NULL;
/* Set up our immediately following block, full of "then"
* instructions.
@@ -149,26 +146,39 @@ cfg_t::create(void *parent_mem_ctx, exec_list *instructions)
break;
case BRW_OPCODE_ELSE:
- cur->add_successor(mem_ctx, cur_endif);
+ cur_else = cur;
next = new_block();
next->start = (backend_instruction *)inst->next;
cur_if->add_successor(mem_ctx, next);
- cur_else = next;
set_next_block(next);
break;
case BRW_OPCODE_ENDIF: {
- cur_endif->start = (backend_instruction *)inst->next;
- cur->add_successor(mem_ctx, cur_endif);
- set_next_block(cur_endif);
+ if (cur->start == inst) {
+ /* New block was just created; use it. */
+ cur_endif = cur;
+ } else {
+ cur_endif = new_block();
+ cur_endif->start = inst;
+
+ cur->end = (backend_instruction *)inst->prev;
+ cur->add_successor(mem_ctx, cur_endif);
+
+ ip--;
+ set_next_block(cur_endif);
+ ip++;
+ }
- if (!cur_else)
- cur_if->add_successor(mem_ctx, cur_endif);
+ backend_instruction *else_inst = NULL;
+ if (cur_else) {
+ else_inst = (backend_instruction *)cur_else->end;
- backend_instruction *else_inst = cur_else ?
- (backend_instruction *) cur_else->start->prev : NULL;
+ cur_else->add_successor(mem_ctx, cur_endif);
+ } else {
+ cur_if->add_successor(mem_ctx, cur_endif);
+ }
assert(cur_if->end->opcode == BRW_OPCODE_IF);
assert(!else_inst || else_inst->opcode == BRW_OPCODE_ELSE);
diff --git a/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp b/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
index 8bdf0943e2e..7de27e3b22e 100644
--- a/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
+++ b/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
@@ -45,10 +45,10 @@ dead_control_flow_eliminate(backend_visitor *v)
bblock_t *block = cfg.blocks[b];
bool found = false;
- /* ENDIF instructions, by definition, can only be found at the ends of
+ /* ENDIF instructions, by definition, can only be found at the start of
* basic blocks.
*/
- backend_instruction *endif_inst = block->end;
+ backend_instruction *endif_inst = block->start;
if (endif_inst->opcode != BRW_OPCODE_ENDIF)
continue;