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authorEric Anholt <eric@anholt.net>2015-06-17 13:24:06 -0700
committerEric Anholt <eric@anholt.net>2015-06-17 23:53:49 -0700
commit1d45e44b2f9e52d6eebe84ab08da6b7393011f95 (patch)
treee3fe4ff406cb3027b82f60fd1d7b84090b928a79 /src/gallium/drivers/vc4/vc4_draw.c
parent9adcd2d80aceec90b9c3712b53d8e7839dc5634b (diff)
vc4: Move tile state/alloc allocation into the kernel.
This avoids a security issue where userspace could have written the tile state/tile alloc behind the GPU's back, and will apparently be necessary for fixing stability bugs (tile state buffers are missing some top bits for the tile alloc's address).
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_draw.c')
-rw-r--r--src/gallium/drivers/vc4/vc4_draw.c37
1 files changed, 4 insertions, 33 deletions
diff --git a/src/gallium/drivers/vc4/vc4_draw.c b/src/gallium/drivers/vc4/vc4_draw.c
index 3e181d0606a..5e6d70d6f33 100644
--- a/src/gallium/drivers/vc4/vc4_draw.c
+++ b/src/gallium/drivers/vc4/vc4_draw.c
@@ -72,44 +72,15 @@ vc4_start_draw(struct vc4_context *vc4)
uint32_t tilew = align(width, 64) / 64;
uint32_t tileh = align(height, 64) / 64;
- /* Tile alloc memory setup: We use an initial alloc size of 32b. The
- * hardware then aligns that to 256b (we use 4096, because all of our
- * BO allocations align to that anyway), then for some reason the
- * simulator wants an extra page available, even if you have overflow
- * memory set up.
- *
- * XXX: The binner only does 28-bit addressing math, so the tile alloc
- * and tile state should be in the same BO and that BO needs to not
- * cross a 256MB boundary, somehow.
- */
- uint32_t tile_alloc_size = 32 * tilew * tileh;
- tile_alloc_size = align(tile_alloc_size, 4096);
- tile_alloc_size += 4096;
- uint32_t tile_state_size = 48 * tilew * tileh;
- if (!vc4->tile_alloc || vc4->tile_alloc->size < tile_alloc_size) {
- vc4_bo_unreference(&vc4->tile_alloc);
- vc4->tile_alloc = vc4_bo_alloc(vc4->screen, tile_alloc_size,
- "tile_alloc");
- }
- if (!vc4->tile_state || vc4->tile_state->size < tile_state_size) {
- vc4_bo_unreference(&vc4->tile_state);
- vc4->tile_state = vc4_bo_alloc(vc4->screen, tile_state_size,
- "tile_state");
- }
-
// Tile state data is 48 bytes per tile, I think it can be thrown away
// as soon as binning is finished.
- cl_start_reloc(&vc4->bcl, 2);
cl_u8(&vc4->bcl, VC4_PACKET_TILE_BINNING_MODE_CONFIG);
- cl_reloc(vc4, &vc4->bcl, vc4->tile_alloc, 0);
- cl_u32(&vc4->bcl, vc4->tile_alloc->size);
- cl_reloc(vc4, &vc4->bcl, vc4->tile_state, 0);
+ cl_u32(&vc4->bcl, 0); /* tile alloc addr, filled by kernel */
+ cl_u32(&vc4->bcl, 0); /* tile alloc size, filled by kernel */
+ cl_u32(&vc4->bcl, 0); /* tile state addr, filled by kernel */
cl_u8(&vc4->bcl, tilew);
cl_u8(&vc4->bcl, tileh);
- cl_u8(&vc4->bcl,
- VC4_BIN_CONFIG_AUTO_INIT_TSDA |
- VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_32 |
- VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_32);
+ cl_u8(&vc4->bcl, 0); /* flags, filled by kernel. */
/* START_TILE_BINNING resets the statechange counters in the hardware,
* which are what is used when a primitive is binned to a tile to