summaryrefslogtreecommitdiff
path: root/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
AgeCommit message (Expand)AuthorFilesLines
2022-06-03nouveau: move codegen to a common higher level directory.Dave Airlie1-2702/+0
2022-06-03nouveau: move codegen into a standalone library.Dave Airlie1-2/+2
2022-05-31nv50/ir: recoginse AmpereKarol Herbst1-0/+2
2022-03-20nouveau: Handle unaligned tlsBase during spillsM Henning1-2/+8
2021-09-02nouveau: use bool literals instead of integersFilip Gawin1-1/+1
2021-05-30nv50/ir/ra: fixes upcoming barrier fileKarol Herbst1-2/+3
2021-05-12nv50/ir: Initialize GCRA::RIG_Node members.Vinson Lee1-2/+2
2021-05-01nv50: add support for doing membarsIlia Mirkin1-0/+7
2021-04-11nv50/ir: fix emission of cas without a destinationIlia Mirkin1-0/+7
2021-01-22nv50/ir: Initialize RegAlloc member func in constructor.Vinson Lee1-1/+1
2021-01-21nv50/ir: Add InsertConstraintsPass constructor.Vinson Lee1-0/+1
2020-11-18nv50/ir: Initialize GCRA members in constructor.Vinson Lee1-0/+2
2020-06-22nv50/ir/ra: fix memory corruption when spillingKarol Herbst1-22/+71
2020-06-22nv50/ir/ra: convert some for loops to Range-based for loopsKarol Herbst1-11/+8
2020-06-10nvir/gv100: enable support for tu1xxBen Skeggs1-0/+2
2020-06-10nvir/gv100: initial supportBen Skeggs1-6/+20
2019-10-17nv50/ir: remove DUMMY edge typeKarol Herbst1-2/+0
2019-02-06nvc0/ir: fix second tex argument after levelZero optimizationIlia Mirkin1-9/+24
2019-01-18gm107/ir: disable TEXS for tex with derivAll setKarol Herbst1-1/+2
2018-12-09nv50/ir: initialize relDegree staticlyKarol Herbst1-7/+16
2018-11-16nv50/ir/ra: enforce max register requirement, and change spill orderIlia Mirkin1-9/+16
2018-11-16nv50/ir/ra: improve condition for short regs, unify with cond for 16-bitIlia Mirkin1-7/+7
2018-11-06gm107/ir: use scalar tex instructions where possibleKarol Herbst1-0/+162
2018-11-06nv50/ra: add condenseDef overloads for partial condensesKarol Herbst1-8/+21
2018-06-23nv50/ir: only avoid spilling constrained def if a mov is addedKarol Herbst1-2/+2
2018-04-22nv50/ir: make a copy of tex src if it's referenced multiple timesIlia Mirkin1-37/+49
2018-04-21nv50/ir/ra: prefer def == src2 for fma with immediates on nvc0Karol Herbst1-10/+29
2017-11-26nv50/ir: when merging immediates/consts, load directlyIlia Mirkin1-1/+21
2017-05-25nouveau: drop Android 4.4 and earlier supportRob Herring1-3/+1
2017-03-31nv50/ir: also do PostRaLoadPropagation for FMAKarol Herbst1-1/+1
2016-10-12nv50/ir: copy over value's register id when resolving merge of a phiIlia Mirkin1-1/+3
2016-10-05nv50/ra: let simplify return an error and handle thatKarol Herbst1-5/+7
2016-07-20gm107/ra: fix constraints for surface operationsSamuel Pitoiset1-2/+23
2016-07-12nvc0: initial support for GP100 GPUsBen Skeggs1-0/+2
2016-05-31nv50/ir: print relevant file's bitset when showing RA infoIlia Mirkin1-4/+4
2016-05-21nv50/ir: fix tex constraints for surface coords on FermiSamuel Pitoiset1-0/+6
2016-05-21nv50/ir: use moveSources to condense sourcesIlia Mirkin1-6/+1
2016-05-21nv50/ir: fix SUSTx constraints on KeplerSamuel Pitoiset1-3/+1
2016-04-26nvc0/ir: fix constraints for OP_SUSTx on KeplerSamuel Pitoiset1-1/+3
2016-04-19Revert "nv50/ra: `isinf()` is in namespace `std` since C++11."Jose Fonseca1-4/+0
2016-04-13nv50/ra: `isinf()` is in namespace `std` since C++11.Pierre Moreau1-0/+4
2016-03-31nv50/ir: Check for valid insn instead of def sizePierre Moreau1-2/+2
2016-02-16nvc0: initial support for GM20x GPUsBen Skeggs1-0/+2
2016-01-26nv50/ir: fix memory corruption when spilling and redoing RAKarol Herbst1-0/+3
2015-12-12nv50/ir: add short imad supportIlia Mirkin1-1/+0
2015-12-08nv50/ir: prefer to color mad def and src2 with the same colorIlia Mirkin1-0/+14
2015-12-08nv50/ir: reduce degree limit on ops that can't encode large reg destsIlia Mirkin1-3/+34
2015-12-08nv50/ir: only unspill once ahead of a group of instructionsIlia Mirkin1-5/+20
2015-12-02nv50/ir: fix moves to/from flagsIlia Mirkin1-0/+4
2015-12-02nv50/ir: do not call textureMask() for surface opsSamuel Pitoiset1-1/+2