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-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.c18
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c35
2 files changed, 34 insertions, 19 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index bdc36fabdb1..67f4ccea5fb 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -216,7 +216,8 @@ blorp_surf_for_miptree(struct brw_context *brw,
intel_miptree_resolve_color(brw, mt,
*level, start_layer, num_layers, flags);
- assert(mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_RESOLVED);
+ assert(!intel_miptree_has_color_unresolved(mt, *level, 1,
+ start_layer, num_layers));
surf->aux_usage = ISL_AUX_USAGE_NONE;
}
}
@@ -811,8 +812,12 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
!brw_is_color_fast_clear_compatible(brw, irb->mt, &ctx->Color.ClearColor))
can_fast_clear = false;
+ const unsigned logical_layer = irb_logical_mt_layer(irb);
const bool is_lossless_compressed = intel_miptree_is_lossless_compressed(
brw, irb->mt);
+ const enum intel_fast_clear_state fast_clear_state =
+ intel_miptree_get_fast_clear_state(irb->mt, irb->mt_level,
+ logical_layer);
if (can_fast_clear) {
union gl_color_union override_color =
@@ -830,8 +835,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
/* If the buffer is already in INTEL_FAST_CLEAR_STATE_CLEAR, the clear
* is redundant and can be skipped.
*/
- if (!color_updated &&
- irb->mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR)
+ if (!color_updated && fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR)
return true;
/* If the MCS buffer hasn't been allocated yet, we need to allocate
@@ -849,7 +853,6 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
}
}
- const unsigned logical_layer = irb_logical_mt_layer(irb);
const unsigned num_layers = fb->MaxNumLayers ? irb->layer_count : 1;
/* We can't setup the blorp_surf until we've allocated the MCS above */
@@ -878,7 +881,9 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
* INTEL_FAST_CLEAR_STATE_CLEAR so that we won't waste time doing
* redundant clears.
*/
- irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR;
+ intel_miptree_set_fast_clear_state(irb->mt, irb->mt_level,
+ logical_layer, num_layers,
+ INTEL_FAST_CLEAR_STATE_CLEAR);
} else {
DBG("%s (slow) to mt %p level %d layer %d+%d\n", __FUNCTION__,
irb->mt, irb->mt_level, irb->mt_layer, num_layers);
@@ -965,7 +970,8 @@ brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt,
resolve_op);
blorp_batch_finish(&batch);
- mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED;
+ intel_miptree_set_fast_clear_state(mt, level, layer, 1,
+ INTEL_FAST_CLEAR_STATE_RESOLVED);
}
static void
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index ec434c7fa1f..6c44381be13 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -441,20 +441,23 @@ brw_find_matching_rb(const struct gl_framebuffer *fb,
static inline bool
brw_texture_view_sane(const struct brw_context *brw,
- const struct intel_mipmap_tree *mt, unsigned format)
+ const struct intel_mipmap_tree *mt,
+ const struct isl_view *view)
{
/* There are special cases only for lossless compression. */
if (!intel_miptree_is_lossless_compressed(brw, mt))
return true;
if (isl_format_supports_lossless_compression(&brw->screen->devinfo,
- format))
+ view->format))
return true;
/* Logic elsewhere needs to take care to resolve the color buffer prior
* to sampling it as non-compressed.
*/
- if (mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_RESOLVED)
+ if (intel_miptree_has_color_unresolved(mt, view->base_level, view->levels,
+ view->base_array_layer,
+ view->array_len))
return false;
const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
@@ -473,15 +476,20 @@ brw_texture_view_sane(const struct brw_context *brw,
static bool
brw_disable_aux_surface(const struct brw_context *brw,
- const struct intel_mipmap_tree *mt)
+ const struct intel_mipmap_tree *mt,
+ const struct isl_view *view)
{
/* Nothing to disable. */
if (!mt->mcs_buf)
return false;
+ const bool is_unresolved = intel_miptree_has_color_unresolved(
+ mt, view->base_level, view->levels,
+ view->base_array_layer, view->array_len);
+
/* There are special cases only for lossless compression. */
if (!intel_miptree_is_lossless_compressed(brw, mt))
- return mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_RESOLVED;
+ return !is_unresolved;
const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
const unsigned rb_index = brw_find_matching_rb(fb, mt);
@@ -499,13 +507,13 @@ brw_disable_aux_surface(const struct brw_context *brw,
*/
if (rb_index < fb->_NumColorDrawBuffers) {
if (brw->draw_aux_buffer_disabled[rb_index]) {
- assert(mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_RESOLVED);
+ assert(!is_unresolved);
}
return brw->draw_aux_buffer_disabled[rb_index];
}
- return mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_RESOLVED;
+ return !is_unresolved;
}
void
@@ -625,10 +633,10 @@ brw_update_texture_surface(struct gl_context *ctx,
obj->Target == GL_TEXTURE_CUBE_MAP_ARRAY)
view.usage |= ISL_SURF_USAGE_CUBE_BIT;
- assert(brw_texture_view_sane(brw, mt, format));
+ assert(brw_texture_view_sane(brw, mt, &view));
- const int flags =
- brw_disable_aux_surface(brw, mt) ? INTEL_AUX_BUFFER_DISABLED : 0;
+ const int flags = brw_disable_aux_surface(brw, mt, &view) ?
+ INTEL_AUX_BUFFER_DISABLED : 0;
brw_emit_surface_state(brw, mt, flags, mt->target, view,
tex_mocs[brw->gen],
surf_offset, surf_index,
@@ -1749,9 +1757,10 @@ update_image_surface(struct brw_context *brw,
};
const int surf_index = surf_offset - &brw->wm.base.surf_offset[0];
- const int flags =
- mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_RESOLVED ?
- INTEL_AUX_BUFFER_DISABLED : 0;
+ const bool unresolved = intel_miptree_has_color_unresolved(
+ mt, view.base_level, view.levels,
+ view.base_array_layer, view.array_len);
+ const int flags = unresolved ? 0 : INTEL_AUX_BUFFER_DISABLED;
brw_emit_surface_state(brw, mt, flags, mt->target, view,
tex_mocs[brw->gen],
surf_offset, surf_index,
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-09 08:21:47 +0000