diff options
| -rw-r--r-- | configure.ac | 3 | ||||
| -rw-r--r-- | src/mesa/Android.libmesa_dricore.mk | 1 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/Android.mk | 5 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 |
4 files changed, 15 insertions, 0 deletions
diff --git a/configure.ac b/configure.ac index 9aeebdf148e..4ff87ebaa9d 100644 --- a/configure.ac +++ b/configure.ac @@ -235,6 +235,9 @@ dnl dnl Optional flags, check for compiler support dnl AX_CHECK_COMPILE_FLAG([-msse4.1], [SSE41_SUPPORTED=1], [SSE41_SUPPORTED=0]) +if test "x$SSE41_SUPPORTED" = x1; then + DEFINES="$DEFINES -DUSE_SSE41" +fi AM_CONDITIONAL([SSE41_SUPPORTED], [test x$SSE41_SUPPORTED = x1]) dnl diff --git a/src/mesa/Android.libmesa_dricore.mk b/src/mesa/Android.libmesa_dricore.mk index 217f6498a79..28d6feb359f 100644 --- a/src/mesa/Android.libmesa_dricore.mk +++ b/src/mesa/Android.libmesa_dricore.mk @@ -50,6 +50,7 @@ endif # MESA_ENABLE_ASM ifeq ($(ARCH_X86_HAVE_SSE4_1),true) LOCAL_SRC_FILES += \ $(SRCDIR)main/streaming-load-memcpy.c +LOCAL_CFLAGS := -msse4.1 endif LOCAL_C_INCLUDES := \ diff --git a/src/mesa/drivers/dri/i965/Android.mk b/src/mesa/drivers/dri/i965/Android.mk index 7e3fd65e880..2c6446f8b38 100644 --- a/src/mesa/drivers/dri/i965/Android.mk +++ b/src/mesa/drivers/dri/i965/Android.mk @@ -35,6 +35,11 @@ include $(LOCAL_PATH)/Makefile.sources LOCAL_CFLAGS := \ $(MESA_DRI_CFLAGS) +ifeq ($(ARCH_X86_HAVE_SSE4_1),true) +LOCAL_CFLAGS += \ + -DUSE_SSE41 +endif + LOCAL_C_INCLUDES := \ $(i965_INCLUDES) \ $(MESA_DRI_C_INCLUDES) \ diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 38396d7e3e6..84a6718be92 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -1843,6 +1843,7 @@ intel_miptree_unmap_blit(struct brw_context *brw, /** * "Map" a buffer by copying it to an untiled temporary using MOVNTDQA. */ +#if defined(USE_SSE41) static void intel_miptree_map_movntdqa(struct brw_context *brw, struct intel_mipmap_tree *mt, @@ -1910,6 +1911,7 @@ intel_miptree_unmap_movntdqa(struct brw_context *brw, map->buffer = NULL; map->ptr = NULL; } +#endif static void intel_miptree_map_s8(struct brw_context *brw, @@ -2290,8 +2292,10 @@ intel_miptree_map(struct brw_context *brw, mt->bo->size >= brw->max_gtt_map_object_size) { assert(can_blit_slice(mt, level, slice)); intel_miptree_map_blit(brw, mt, map, level, slice); +#if defined(USE_SSE41) } else if (!(mode & GL_MAP_WRITE_BIT) && !mt->compressed && cpu_has_sse4_1) { intel_miptree_map_movntdqa(brw, mt, map, level, slice); +#endif } else { intel_miptree_map_gtt(brw, mt, map, level, slice); } @@ -2328,8 +2332,10 @@ intel_miptree_unmap(struct brw_context *brw, intel_miptree_unmap_depthstencil(brw, mt, map, level, slice); } else if (map->mt) { intel_miptree_unmap_blit(brw, mt, map, level, slice); +#if defined(USE_SSE41) } else if (map->buffer && cpu_has_sse4_1) { intel_miptree_unmap_movntdqa(brw, mt, map, level, slice); +#endif } else { intel_miptree_unmap_gtt(brw, mt, map, level, slice); } |