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authorMarek Olšák <maraeo@gmail.com>2011-09-11 14:53:07 +0200
committerMarek Olšák <maraeo@gmail.com>2011-09-12 22:03:02 +0200
commit3603d157889544230f1787bbdc4915ccd7461c59 (patch)
tree2d153a57ef3c74c4f4768c34a79775e01305a7ce /src/gallium/winsys/r600
parenta94e33a8efcbbc093092cfc5266ed9d05b89471f (diff)
r600g: compute tiling info in the pipe, not in the winsys
The winsys doesn't need it.
Diffstat (limited to 'src/gallium/winsys/r600')
-rw-r--r--src/gallium/winsys/r600/drm/r600_drm.c120
-rw-r--r--src/gallium/winsys/r600/drm/r600_priv.h1
2 files changed, 0 insertions, 121 deletions
diff --git a/src/gallium/winsys/r600/drm/r600_drm.c b/src/gallium/winsys/r600/drm/r600_drm.c
index 1917f87bcf6..d9eeda9e9f8 100644
--- a/src/gallium/winsys/r600/drm/r600_drm.c
+++ b/src/gallium/winsys/r600/drm/r600_drm.c
@@ -41,11 +41,6 @@ enum chip_class r600_get_family_class(struct radeon *radeon)
return radeon->chip_class;
}
-struct r600_tiling_info *r600_get_tiling_info(struct radeon *radeon)
-{
- return &radeon->tiling_info;
-}
-
unsigned r600_get_clock_crystal_freq(struct radeon *radeon)
{
return radeon->info.r600_clock_crystal_freq;
@@ -71,110 +66,6 @@ unsigned r600_get_minor_version(struct radeon *radeon)
return radeon->info.drm_minor;
}
-static int r600_interpret_tiling(struct radeon *radeon, uint32_t tiling_config)
-{
- switch ((tiling_config & 0xe) >> 1) {
- case 0:
- radeon->tiling_info.num_channels = 1;
- break;
- case 1:
- radeon->tiling_info.num_channels = 2;
- break;
- case 2:
- radeon->tiling_info.num_channels = 4;
- break;
- case 3:
- radeon->tiling_info.num_channels = 8;
- break;
- default:
- return -EINVAL;
- }
-
- switch ((tiling_config & 0x30) >> 4) {
- case 0:
- radeon->tiling_info.num_banks = 4;
- break;
- case 1:
- radeon->tiling_info.num_banks = 8;
- break;
- default:
- return -EINVAL;
-
- }
- switch ((tiling_config & 0xc0) >> 6) {
- case 0:
- radeon->tiling_info.group_bytes = 256;
- break;
- case 1:
- radeon->tiling_info.group_bytes = 512;
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-static int eg_interpret_tiling(struct radeon *radeon, uint32_t tiling_config)
-{
- switch (tiling_config & 0xf) {
- case 0:
- radeon->tiling_info.num_channels = 1;
- break;
- case 1:
- radeon->tiling_info.num_channels = 2;
- break;
- case 2:
- radeon->tiling_info.num_channels = 4;
- break;
- case 3:
- radeon->tiling_info.num_channels = 8;
- break;
- default:
- return -EINVAL;
- }
-
- switch ((tiling_config & 0xf0) >> 4) {
- case 0:
- radeon->tiling_info.num_banks = 4;
- break;
- case 1:
- radeon->tiling_info.num_banks = 8;
- break;
- case 2:
- radeon->tiling_info.num_banks = 16;
- break;
- default:
- return -EINVAL;
-
- }
-
- switch ((tiling_config & 0xf00) >> 8) {
- case 0:
- radeon->tiling_info.group_bytes = 256;
- break;
- case 1:
- radeon->tiling_info.group_bytes = 512;
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-static int radeon_drm_get_tiling(struct radeon *radeon)
-{
- uint32_t tiling_config = radeon->info.r600_tiling_config;
-
- if (!tiling_config)
- return 0;
-
- if (radeon->chip_class == R600 || radeon->chip_class == R700) {
- return r600_interpret_tiling(radeon, tiling_config);
- } else {
- return eg_interpret_tiling(radeon, tiling_config);
- }
-}
-
static unsigned radeon_family_from_device(unsigned device)
{
switch (device) {
@@ -212,16 +103,12 @@ struct radeon *radeon_create(struct radeon_winsys *ws)
case CHIP_RS780:
case CHIP_RS880:
radeon->chip_class = R600;
- /* set default group bytes, overridden by tiling info ioctl */
- radeon->tiling_info.group_bytes = 256;
break;
case CHIP_RV770:
case CHIP_RV730:
case CHIP_RV710:
case CHIP_RV740:
radeon->chip_class = R700;
- /* set default group bytes, overridden by tiling info ioctl */
- radeon->tiling_info.group_bytes = 256;
break;
case CHIP_CEDAR:
case CHIP_REDWOOD:
@@ -235,13 +122,9 @@ struct radeon *radeon_create(struct radeon_winsys *ws)
case CHIP_TURKS:
case CHIP_CAICOS:
radeon->chip_class = EVERGREEN;
- /* set default group bytes, overridden by tiling info ioctl */
- radeon->tiling_info.group_bytes = 512;
break;
case CHIP_CAYMAN:
radeon->chip_class = CAYMAN;
- /* set default group bytes, overridden by tiling info ioctl */
- radeon->tiling_info.group_bytes = 512;
break;
default:
fprintf(stderr, "%s unknown or unsupported chipset 0x%04X\n",
@@ -249,9 +132,6 @@ struct radeon *radeon_create(struct radeon_winsys *ws)
break;
}
- if (radeon_drm_get_tiling(radeon))
- return NULL;
-
return radeon;
}
diff --git a/src/gallium/winsys/r600/drm/r600_priv.h b/src/gallium/winsys/r600/drm/r600_priv.h
index 2b8c85a1431..36a24377e79 100644
--- a/src/gallium/winsys/r600/drm/r600_priv.h
+++ b/src/gallium/winsys/r600/drm/r600_priv.h
@@ -39,7 +39,6 @@ struct radeon {
struct radeon_info info;
unsigned family;
enum chip_class chip_class;
- struct r600_tiling_info tiling_info;
};
/* these flags are used in register flags and added into block flags */