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authorMarek Olšák <marek.olsak@amd.com>2014-05-06 20:04:31 +0200
committerMarek Olšák <marek.olsak@amd.com>2014-06-02 12:58:22 +0200
commitd0e8b65aed107b6c17dfc70cd1914f9ac1408810 (patch)
treee3efebb79def18ca63d26a9f20a93611c54723d2 /src/gallium/drivers/radeonsi
parent99df120e006dbbce7aaf4b1466db423aa2432e54 (diff)
radeonsi: implement SAMPLEMASK fragment shader output
Diffstat (limited to 'src/gallium/drivers/radeonsi')
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.c18
1 files changed, 15 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 5f9abe3face..c54041433bf 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1346,7 +1346,7 @@ static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context * bld_base)
LLVMValueRef args[9];
LLVMValueRef last_args[9] = { 0 };
unsigned semantic_name;
- int depth_index = -1, stencil_index = -1;
+ int depth_index = -1, stencil_index = -1, samplemask_index = -1;
int i;
while (!tgsi_parse_end_of_tokens(parse)) {
@@ -1379,6 +1379,9 @@ static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context * bld_base)
case TGSI_SEMANTIC_STENCIL:
stencil_index = index;
continue;
+ case TGSI_SEMANTIC_SAMPLEMASK:
+ samplemask_index = index;
+ continue;
case TGSI_SEMANTIC_COLOR:
target = V_008DFC_SQ_EXP_MRT + d->Semantic.Index;
if (si_shader_ctx->shader->key.ps.alpha_to_one)
@@ -1436,7 +1439,7 @@ static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context * bld_base)
}
}
- if (depth_index >= 0 || stencil_index >= 0) {
+ if (depth_index >= 0 || stencil_index >= 0 || samplemask_index >= 0) {
LLVMValueRef out_ptr;
unsigned mask = 0;
@@ -1466,7 +1469,16 @@ static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context * bld_base)
S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(1);
}
- if (stencil_index >= 0)
+ if (samplemask_index >= 0) {
+ out_ptr = si_shader_ctx->radeon_bld.soa.outputs[samplemask_index][0];
+ args[7] = LLVMBuildLoad(base->gallivm->builder, out_ptr, "");
+ mask |= 0xf; /* Set all components. */
+ si_shader_ctx->shader->db_shader_control |= S_02880C_MASK_EXPORT_ENABLE(1);
+ }
+
+ if (samplemask_index >= 0)
+ si_shader_ctx->shader->spi_shader_z_format = V_028710_SPI_SHADER_32_ABGR;
+ else if (stencil_index >= 0)
si_shader_ctx->shader->spi_shader_z_format = V_028710_SPI_SHADER_32_GR;
else
si_shader_ctx->shader->spi_shader_z_format = V_028710_SPI_SHADER_32_R;