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authorTom Stellard <thomas.stellard@amd.com>2012-07-18 13:39:00 -0400
committerTom Stellard <thomas.stellard@amd.com>2012-07-27 17:08:07 +0000
commite8825ce6e12a8ec6fbe1ef76fb5e8ef8eb1b1218 (patch)
treeaf8b8ac6ff91c9934533c6bb52a495a23d447ad2
parent87272e9e2560a88352cf54d164507569ac43e502 (diff)
radeon/llvm: Custom lower BR_CC for SI
-rw-r--r--src/gallium/drivers/radeon/SIISelLowering.cpp37
-rw-r--r--src/gallium/drivers/radeon/SIISelLowering.h4
2 files changed, 41 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/SIISelLowering.cpp b/src/gallium/drivers/radeon/SIISelLowering.cpp
index 9970251128a..8528f73e409 100644
--- a/src/gallium/drivers/radeon/SIISelLowering.cpp
+++ b/src/gallium/drivers/radeon/SIISelLowering.cpp
@@ -36,6 +36,7 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) :
setOperationAction(ISD::ADD, MVT::i64, Legal);
setOperationAction(ISD::ADD, MVT::i32, Legal);
+ setOperationAction(ISD::BR_CC, MVT::i32, Custom);
}
MachineBasicBlock * SITargetLowering::EmitInstrWithCustomInserter(
@@ -193,3 +194,39 @@ void SITargetLowering::lowerUSE_SGPR(MachineInstr *MI,
addLiveIn(MI, MF, MRI, TII, newReg);
}
+//===----------------------------------------------------------------------===//
+// Custom DAG Lowering Operations
+//===----------------------------------------------------------------------===//
+
+SDValue SITargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
+{
+ switch (Op.getOpcode()) {
+ default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
+ case ISD::BR_CC: return LowerBR_CC(Op, DAG);
+ }
+}
+
+SDValue SITargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const
+{
+ SDValue Chain = Op.getOperand(0);
+ SDValue CC = Op.getOperand(1);
+ SDValue LHS = Op.getOperand(2);
+ SDValue RHS = Op.getOperand(3);
+ SDValue JumpT = Op.getOperand(4);
+ SDValue CmpValue;
+ SDValue Result;
+ CmpValue = DAG.getNode(
+ ISD::SETCC,
+ Op.getDebugLoc(),
+ MVT::i1,
+ LHS, RHS,
+ CC);
+
+ Result = DAG.getNode(
+ AMDILISD::BRANCH_COND,
+ CmpValue.getDebugLoc(),
+ MVT::Other, Chain,
+ JumpT, CmpValue);
+ return Result;
+}
+
diff --git a/src/gallium/drivers/radeon/SIISelLowering.h b/src/gallium/drivers/radeon/SIISelLowering.h
index 4a1bc38b5f6..c14b7574652 100644
--- a/src/gallium/drivers/radeon/SIISelLowering.h
+++ b/src/gallium/drivers/radeon/SIISelLowering.h
@@ -37,10 +37,14 @@ class SITargetLowering : public AMDGPUTargetLowering
MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const;
void lowerUSE_SGPR(MachineInstr *MI, MachineFunction * MF,
MachineRegisterInfo & MRI) const;
+
+ SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
+
public:
SITargetLowering(TargetMachine &tm);
virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr * MI,
MachineBasicBlock * BB) const;
+ virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
};
} // End namespace llvm