diff options
| author | Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> | 2020-11-07 00:38:39 +0100 |
|---|---|---|
| committer | Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> | 2021-01-29 00:05:36 +0100 |
| commit | d938fcefb96fb86486255988f79ef72d987cd907 (patch) | |
| tree | 2347b461f14ab5806b6e93d098f9eacdf95e870f | |
| parent | 7d0c940d703f25698d4d4ec38060015261b66bfd (diff) | |
radv: Expose VK_KHR_workgroup_memory_explicit_layout.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8752>
| -rw-r--r-- | docs/relnotes/new_features.txt | 2 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 9 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_extensions.py | 1 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_shader.c | 7 |
4 files changed, 16 insertions, 3 deletions
diff --git a/docs/relnotes/new_features.txt b/docs/relnotes/new_features.txt index 9bb20c6e764..e08d5eeeeca 100644 --- a/docs/relnotes/new_features.txt +++ b/docs/relnotes/new_features.txt @@ -13,4 +13,4 @@ Panfrost g31/g52/g72 exposes ES 3.0 Panfrost t760+ exposes GL 3.1 (including on Bifrost) Sparse memory support on RADV Rapid packed math (16bit-vectorization) on RADV -VK_KHR_workgroup_memory_explicit_layout on Intel +VK_KHR_workgroup_memory_explicit_layout on Intel, RADV diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 2a06fc3a5ee..7353fb46abd 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -1509,6 +1509,15 @@ void radv_GetPhysicalDeviceFeatures2( features->attachmentFragmentShadingRate = false; /* TODO */ break; } + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_WORKGROUP_MEMORY_EXPLICIT_LAYOUT_FEATURES_KHR: { + VkPhysicalDeviceWorkgroupMemoryExplicitLayoutFeaturesKHR *features = + (VkPhysicalDeviceWorkgroupMemoryExplicitLayoutFeaturesKHR *)ext; + features->workgroupMemoryExplicitLayout = true; + features->workgroupMemoryExplicitLayoutScalarBlockLayout = true; + features->workgroupMemoryExplicitLayout8BitAccess = true; + features->workgroupMemoryExplicitLayout16BitAccess = true; + break; + } default: break; } diff --git a/src/amd/vulkan/radv_extensions.py b/src/amd/vulkan/radv_extensions.py index 16ccdee221e..ddc92784f25 100644 --- a/src/amd/vulkan/radv_extensions.py +++ b/src/amd/vulkan/radv_extensions.py @@ -116,6 +116,7 @@ EXTENSIONS = [ Extension('VK_KHR_variable_pointers', 1, True), Extension('VK_KHR_vulkan_memory_model', 3, True), Extension('VK_KHR_wayland_surface', 6, 'VK_USE_PLATFORM_WAYLAND_KHR'), + Extension('VK_KHR_workgroup_memory_explicit_layout', 1, True), Extension('VK_KHR_xcb_surface', 6, 'VK_USE_PLATFORM_XCB_KHR'), Extension('VK_KHR_xlib_surface', 6, 'VK_USE_PLATFORM_XLIB_KHR'), Extension('VK_EXT_4444_formats', 1, True), diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 3ecb8cbbe6f..70ba75a53e5 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -493,6 +493,7 @@ radv_shader_compile_to_nir(struct radv_device *device, .vk_memory_model = true, .vk_memory_model_device_scope = true, .fragment_shading_rate = device->physical_device->rad_info.chip_class >= GFX10_3, + .workgroup_memory_explicit_layout = true, }, .ubo_addr_format = nir_address_format_32bit_index_offset, .ssbo_addr_format = nir_address_format_32bit_index_offset, @@ -679,8 +680,10 @@ radv_shader_compile_to_nir(struct radv_device *device, /* Lower deref operations for compute shared memory. */ if (nir->info.stage == MESA_SHADER_COMPUTE) { - NIR_PASS_V(nir, nir_lower_vars_to_explicit_types, - nir_var_mem_shared, shared_var_info); + if (!nir->info.cs.shared_memory_explicit_layout) { + NIR_PASS_V(nir, nir_lower_vars_to_explicit_types, + nir_var_mem_shared, shared_var_info); + } NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_shared, nir_address_format_32bit_offset); } |