diff options
| author | Iago Toral Quiroga <itoral@igalia.com> | 2022-02-17 10:29:14 +0100 |
|---|---|---|
| committer | Marge Bot <emma+marge@anholt.net> | 2022-02-24 11:36:00 +0000 |
| commit | cf99584f51099a23e7ecc6db40709b4fead22220 (patch) | |
| tree | c3697f9ac0132db8c32ff5f84283ba815580bada | |
| parent | f1d20ec67c3f186886b97de94f74484650f8fda1 (diff) | |
broadcom/compiler: move uniforms right before their first use after scheduling
On V3D the quality of the code we generate is significantly affected by
how we decide to assign accumulators during register allocation, which
is determined by liveness, favoring short-lived temps.
There are many shaders that end up doing a whole lot of uniform loads
first, and using them later, which is very inconvenient for our register
allocation process because this increases uniform liveness and causes
us to use accumulators less efficientely, leading to significant churn.
To fix this, we move uniforms right before their first use in the same
block, but we need to do this after NIR scheduling, which means we are
doing it in non-SSA form, since the scheduler has a tendency to undo
this optimization and it is not easy to modify it to avoid it, since it
works in more abstract terms, using instruction dependencies, estimated
register pressure and instruction delay information to do its work,
which are very different concepts.
total instructions in shared programs: 13316738 -> 13033613 (-2.13%)
instructions in affected programs: 10389172 -> 10106047 (-2.73%)
helped: 55442
HURT: 16144
total threads in shared programs: 413722 -> 415048 (0.32%)
threads in affected programs: 1428 -> 2754 (92.86%)
helped: 680
HURT: 17
total loops in shared programs: 1716 -> 1690 (-1.52%)
loops in affected programs: 26 -> 0
helped: 26
HURT: 0
total uniforms in shared programs: 3704313 -> 3705181 (0.02%)
uniforms in affected programs: 687730 -> 688598 (0.13%)
helped: 2920
HURT: 7384
total max-temps in shared programs: 2364785 -> 2175190 (-8.02%)
max-temps in affected programs: 1215387 -> 1025792 (-15.60%)
helped: 49667
HURT: 1556
total spills in shared programs: 4241 -> 4248 (0.17%)
spills in affected programs: 642 -> 649 (1.09%)
helped: 11
HURT: 19
total fills in shared programs: 6115 -> 6125 (0.16%)
fills in affected programs: 1276 -> 1286 (0.78%)
helped: 11
HURT: 21
total sfu-stalls in shared programs: 34381 -> 36578 (6.39%)
sfu-stalls in affected programs: 16055 -> 18252 (13.68%)
helped: 3647
HURT: 5206
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15056>
| -rw-r--r-- | src/broadcom/compiler/vir.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/broadcom/compiler/vir.c b/src/broadcom/compiler/vir.c index befb4c34107..b11fdf9b095 100644 --- a/src/broadcom/compiler/vir.c +++ b/src/broadcom/compiler/vir.c @@ -1568,6 +1568,8 @@ v3d_attempt_compile(struct v3d_compile *c) if (!c->disable_constant_ubo_load_sorting) NIR_PASS_V(c->s, v3d_nir_sort_constant_ubo_loads, c); + NIR_PASS_V(c->s, nir_opt_move, nir_move_load_uniform); + v3d_nir_to_vir(c); } |