diff options
| author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2016-02-23 11:02:35 +0200 |
|---|---|---|
| committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2016-05-12 19:49:37 +0300 |
| commit | cd9e97a02085b68799fd347a1e8e4b7aa6668334 (patch) | |
| tree | fe205a2d0febc9d622327d9cdf574587a19349ee | |
| parent | cda8c2a9111d4fc45fac6227d895dbb9770dbb84 (diff) | |
i965: Set render state for lossless compressed
v2: Add support for blorp and removed the support for meta
v3 (Ben): Add assertion on compressed non-fast clear - must
be partial clear.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 7 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_draw.c | 7 |
3 files changed, 16 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index c8eb87f9f40..9eeb89dbbbe 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp @@ -2232,4 +2232,7 @@ brw_blorp_blit_miptrees(struct brw_context *brw, brw_blorp_exec(brw, ¶ms); intel_miptree_slice_set_needs_hiz_resolve(dst_mt, dst_level, dst_layer); + + if (intel_miptree_is_lossless_compressed(brw, dst_mt)) + dst_mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED; } diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp index d6c846a57ce..23a7594ef58 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp @@ -344,6 +344,13 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb, * redundant clears. */ irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR; + } else if (intel_miptree_is_lossless_compressed(brw, irb->mt)) { + /* Compressed buffers can be cleared also using normal rep-clear. In + * such case they bahave such as if they were drawn using normal 3D + * render pipeline, and we simply mark the mcs as dirty. + */ + assert(partial_clear); + irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED; } return true; diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index dcbb6819aab..bb963f467f9 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -386,8 +386,13 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw) struct intel_renderbuffer *irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]); - if (irb) + if (irb) { brw_render_cache_set_add_bo(brw, irb->mt->bo); + + if (intel_miptree_is_lossless_compressed(brw, irb->mt)) { + irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED; + } + } } } |