diff options
| author | Marek Olšák <marek.olsak@amd.com> | 2014-09-18 22:26:02 +0200 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2015-07-23 00:59:31 +0200 |
| commit | c2670463fd50f5b74066f0e0ab8f9a31dcb37429 (patch) | |
| tree | 1ec1ce3b40f7035ece230b543b6e0c43fc3f0ae4 | |
| parent | 3ce91c727f2a00a05f414351266b0b45d677611e (diff) | |
radeonsi: add debug flags for dumping tessellation shaders
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.c | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.h | 20 |
2 files changed, 17 insertions, 9 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index 94a7535f531..fb834b01dcd 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -333,6 +333,8 @@ static const struct debug_named_value common_debug_options[] = { { "gs", DBG_GS, "Print geometry shaders" }, { "ps", DBG_PS, "Print pixel shaders" }, { "cs", DBG_CS, "Print compute shaders" }, + { "tcs", DBG_TCS, "Print tessellation control shaders" }, + { "tes", DBG_TES, "Print tessellation evaluation shaders" }, /* features */ { "nodma", DBG_NO_ASYNC_DMA, "Disable asynchronous DMA" }, @@ -956,6 +958,10 @@ bool r600_can_dump_shader(struct r600_common_screen *rscreen, switch (tgsi_get_processor_type(tokens)) { case TGSI_PROCESSOR_VERTEX: return (rscreen->debug_flags & DBG_VS) != 0; + case TGSI_PROCESSOR_TESS_CTRL: + return (rscreen->debug_flags & DBG_TCS) != 0; + case TGSI_PROCESSOR_TESS_EVAL: + return (rscreen->debug_flags & DBG_TES) != 0; case TGSI_PROCESSOR_GEOMETRY: return (rscreen->debug_flags & DBG_GS) != 0; case TGSI_PROCESSOR_FRAGMENT: diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 6f736eb17a5..d225f2528ab 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -79,16 +79,18 @@ #define DBG_GS (1 << 7) #define DBG_PS (1 << 8) #define DBG_CS (1 << 9) +#define DBG_TCS (1 << 10) +#define DBG_TES (1 << 11) /* features */ -#define DBG_NO_ASYNC_DMA (1 << 10) -#define DBG_NO_HYPERZ (1 << 11) -#define DBG_NO_DISCARD_RANGE (1 << 12) -#define DBG_NO_2D_TILING (1 << 13) -#define DBG_NO_TILING (1 << 14) -#define DBG_SWITCH_ON_EOP (1 << 15) -#define DBG_FORCE_DMA (1 << 16) -#define DBG_PRECOMPILE (1 << 17) -#define DBG_INFO (1 << 18) +#define DBG_NO_ASYNC_DMA (1 << 12) +#define DBG_NO_HYPERZ (1 << 13) +#define DBG_NO_DISCARD_RANGE (1 << 14) +#define DBG_NO_2D_TILING (1 << 15) +#define DBG_NO_TILING (1 << 16) +#define DBG_SWITCH_ON_EOP (1 << 17) +#define DBG_FORCE_DMA (1 << 18) +#define DBG_PRECOMPILE (1 << 19) +#define DBG_INFO (1 << 20) /* The maximum allowed bit is 20. */ #define R600_MAP_BUFFER_ALIGNMENT 64 |