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| author | Timur Kristóf <timur.kristof@gmail.com> | 2019-09-26 17:46:43 +0200 |
|---|---|---|
| committer | Timur Kristóf <timur.kristof@gmail.com> | 2019-10-10 09:57:52 +0200 |
| commit | bbe87eb6c39e991fcb737ed31f053b44656fe5f8 (patch) | |
| tree | e20b6f8683d054d48590a52ebb771e2340b4803e | |
| parent | b6235651b9c3460cbd63adb3f692c4ed5cecb719 (diff) | |
aco: Support GFX10 VINTRP in aco_assembler.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
| -rw-r--r-- | src/amd/compiler/aco_assembler.cpp | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/amd/compiler/aco_assembler.cpp b/src/amd/compiler/aco_assembler.cpp index a9fefb832a9..f6a3999afe4 100644 --- a/src/amd/compiler/aco_assembler.cpp +++ b/src/amd/compiler/aco_assembler.cpp @@ -216,7 +216,15 @@ void emit_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction* } case Format::VINTRP: { Interp_instruction* interp = static_cast<Interp_instruction*>(instr); - uint32_t encoding = (0b110101 << 26); + uint32_t encoding = 0; + + if (ctx.chip_class == GFX8 || ctx.chip_class == GFX9) { + encoding = (0b110101 << 26); /* Vega ISA doc says 110010 but it's wrong */ + } else { + encoding = (0b110010 << 26); + } + + assert(encoding); encoding |= (0xFF & instr->definitions[0].physReg().reg) << 18; encoding |= opcode << 16; encoding |= interp->attribute << 10; |