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| author | Duncan Hopkins <duncan@duncanhopkins.me.uk> | 2019-09-24 16:03:04 +0100 |
|---|---|---|
| committer | Erik Faye-Lund <erik.faye-lund@collabora.com> | 2019-10-29 20:38:26 +0000 |
| commit | bb8e6994ccb17e0ecb985d8f645f1a961d4b0355 (patch) | |
| tree | dadcae2bec86cfe4ecfb6b0c91bbb93b2f548c0e | |
| parent | 52aa7f3e0509a1e6cf42c37c0c83730484633194 (diff) | |
zink: pass line width from rast_state to gfx_pipeline_state.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
| -rw-r--r-- | src/gallium/drivers/zink/zink_state.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/zink/zink_state.c b/src/gallium/drivers/zink/zink_state.c index dba85ef43e8..340c725f9dc 100644 --- a/src/gallium/drivers/zink/zink_state.c +++ b/src/gallium/drivers/zink/zink_state.c @@ -422,8 +422,10 @@ zink_bind_rasterizer_state(struct pipe_context *pctx, void *cso) struct zink_context *ctx = zink_context(pctx); ctx->rast_state = cso; - if (ctx->rast_state) + if (ctx->rast_state) { ctx->gfx_pipeline_state.rast_state = &ctx->rast_state->hw_state; + ctx->gfx_pipeline_state.line_width = ctx->rast_state->line_width; + } } static void |