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authorKenneth Graunke <kenneth@whitecape.org>2013-06-28 19:38:13 -0700
committerKenneth Graunke <kenneth@whitecape.org>2013-07-03 10:48:14 -0700
commitabc2bdffd6fe814d546a496733162fb1732f4c94 (patch)
treee42172baa391a813458408d8df0b2ce4266eba9c
parent2c602d2adff5bbe2954fdde63adcea63c2a499ed (diff)
i965: Replace maxBatchSize variable with BATCH_SZ define.
maxBatchSize was only ever initialized to BATCH_SZ, and a few places used BATCH_SZ directly anyway. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.c4
-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.h2
-rw-r--r--src/mesa/drivers/dri/i965/intel_context.c1
-rw-r--r--src/mesa/drivers/dri/i965/intel_context.h1
4 files changed, 3 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 46f17fd1927..409df29c7d1 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -71,7 +71,7 @@ intel_batchbuffer_init(struct intel_context *intel)
}
if (!intel->has_llc) {
- intel->batch.cpu_map = malloc(intel->maxBatchSize);
+ intel->batch.cpu_map = malloc(BATCH_SZ);
intel->batch.map = intel->batch.cpu_map;
}
}
@@ -88,7 +88,7 @@ intel_batchbuffer_reset(struct intel_context *intel)
clear_cache(intel);
intel->batch.bo = drm_intel_bo_alloc(intel->bufmgr, "batchbuffer",
- intel->maxBatchSize, 4096);
+ BATCH_SZ, 4096);
if (intel->has_llc) {
drm_intel_bo_map(intel->batch.bo, true);
intel->batch.map = intel->batch.bo->virtual;
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
index 1a6d1aa4946..08455453d37 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
@@ -111,7 +111,7 @@ intel_batchbuffer_require_space(struct intel_context *intel,
intel->batch.is_blit = is_blit;
#ifdef DEBUG
- assert(sz < intel->maxBatchSize - BATCH_RESERVED);
+ assert(sz < BATCH_SZ - BATCH_RESERVED);
#endif
if (intel_batchbuffer_space(intel) < sz)
intel_batchbuffer_flush(intel);
diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c
index cf0060382b1..e4d7bd50bc8 100644
--- a/src/mesa/drivers/dri/i965/intel_context.c
+++ b/src/mesa/drivers/dri/i965/intel_context.c
@@ -510,7 +510,6 @@ intelInitContext(struct intel_context *intel,
driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
sPriv->myNum, "i965");
- intel->maxBatchSize = BATCH_SZ;
/* Estimate the size of the mappable aperture into the GTT. There's an
* ioctl to get the whole GTT size, but not one to get the mappable subset.
diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h
index 5fd9ccd1aeb..a55572307ec 100644
--- a/src/mesa/drivers/dri/i965/intel_context.h
+++ b/src/mesa/drivers/dri/i965/intel_context.h
@@ -155,7 +155,6 @@ struct intel_context
GLuint NewGLState;
dri_bufmgr *bufmgr;
- unsigned int maxBatchSize;
/**
* Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.