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authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>2019-11-23 21:44:16 -0500
committerTomeu Vizoso <tomeu.vizoso@collabora.co.uk>2019-12-16 09:10:33 +0000
commita2d5503b68ab54055bad2592aff7cbe193c2345b (patch)
tree2d91c7b0955fa69416520e12486fcec409e71267
parent2c1983aefeb6dacfbc61f9edd71975ea359fae40 (diff)
panfrost: Pass blend RT number through
We have to key the blend shader for the render target number due to writeout silliness. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Tomeu Visoso <tomeu.vizoso@collabora.com>
-rw-r--r--src/gallium/drivers/panfrost/pan_assemble.c2
-rw-r--r--src/gallium/drivers/panfrost/pan_blend_cso.c9
-rw-r--r--src/gallium/drivers/panfrost/pan_blend_shaders.c5
-rw-r--r--src/gallium/drivers/panfrost/pan_blend_shaders.h3
-rw-r--r--src/panfrost/midgard/compiler.h3
-rw-r--r--src/panfrost/midgard/midgard_compile.c7
-rw-r--r--src/panfrost/midgard/midgard_compile.h2
7 files changed, 19 insertions, 12 deletions
diff --git a/src/gallium/drivers/panfrost/pan_assemble.c b/src/gallium/drivers/panfrost/pan_assemble.c
index e91b20df971..62a4dd654b6 100644
--- a/src/gallium/drivers/panfrost/pan_assemble.c
+++ b/src/gallium/drivers/panfrost/pan_assemble.c
@@ -65,7 +65,7 @@ panfrost_shader_compile(
.alpha_ref = state->alpha_state.ref_value
};
- midgard_compile_shader_nir(s, &program, false, screen->gpu_id);
+ midgard_compile_shader_nir(s, &program, false, 0, screen->gpu_id);
/* Prepare the compiled binary for upload */
int size = program.compiled.size;
diff --git a/src/gallium/drivers/panfrost/pan_blend_cso.c b/src/gallium/drivers/panfrost/pan_blend_cso.c
index 69683098c68..1dd211e6b4c 100644
--- a/src/gallium/drivers/panfrost/pan_blend_cso.c
+++ b/src/gallium/drivers/panfrost/pan_blend_cso.c
@@ -75,11 +75,12 @@ panfrost_get_blend_shader(
/* Prevent NULL collision issues.. */
assert(fmt != 0);
- /* Check the cache */
+ /* Check the cache. Key by the RT and format */
struct hash_table_u64 *shaders = blend->rt[rt].shaders;
+ unsigned key = (fmt << 3) | rt;
struct panfrost_blend_shader *shader =
- _mesa_hash_table_u64_search(shaders, fmt);
+ _mesa_hash_table_u64_search(shaders, key);
if (shader)
return shader;
@@ -87,10 +88,10 @@ panfrost_get_blend_shader(
/* Cache miss. Build one instead, cache it, and go */
struct panfrost_blend_shader generated =
- panfrost_compile_blend_shader(ctx, &blend->base, fmt);
+ panfrost_compile_blend_shader(ctx, &blend->base, fmt, rt);
shader = mem_dup(&generated, sizeof(generated));
- _mesa_hash_table_u64_insert(shaders, fmt, shader);
+ _mesa_hash_table_u64_insert(shaders, key, shader);
return shader;
}
diff --git a/src/gallium/drivers/panfrost/pan_blend_shaders.c b/src/gallium/drivers/panfrost/pan_blend_shaders.c
index 5d7eb9573eb..62177ccf7e4 100644
--- a/src/gallium/drivers/panfrost/pan_blend_shaders.c
+++ b/src/gallium/drivers/panfrost/pan_blend_shaders.c
@@ -129,7 +129,8 @@ struct panfrost_blend_shader
panfrost_compile_blend_shader(
struct panfrost_context *ctx,
struct pipe_blend_state *cso,
- enum pipe_format format)
+ enum pipe_format format,
+ unsigned rt)
{
struct panfrost_screen *screen = pan_screen(ctx->base.screen);
struct panfrost_blend_shader res;
@@ -173,7 +174,7 @@ panfrost_compile_blend_shader(
/* Compile the built shader */
midgard_program program;
- midgard_compile_shader_nir(shader, &program, true, screen->gpu_id);
+ midgard_compile_shader_nir(shader, &program, true, rt, screen->gpu_id);
/* Allow us to patch later */
res.patch_index = program.blend_patch_offset;
diff --git a/src/gallium/drivers/panfrost/pan_blend_shaders.h b/src/gallium/drivers/panfrost/pan_blend_shaders.h
index 88ece5436a4..5931cbc41ce 100644
--- a/src/gallium/drivers/panfrost/pan_blend_shaders.h
+++ b/src/gallium/drivers/panfrost/pan_blend_shaders.h
@@ -35,6 +35,7 @@ struct panfrost_blend_shader
panfrost_compile_blend_shader(
struct panfrost_context *ctx,
struct pipe_blend_state *cso,
- enum pipe_format format);
+ enum pipe_format format,
+ unsigned rt);
#endif
diff --git a/src/panfrost/midgard/compiler.h b/src/panfrost/midgard/compiler.h
index faeecf0150c..d087579f36d 100644
--- a/src/panfrost/midgard/compiler.h
+++ b/src/panfrost/midgard/compiler.h
@@ -224,6 +224,9 @@ typedef struct compiler_context {
/* Is internally a blend shader? Depends on stage == FRAGMENT */
bool is_blend;
+ /* Render target number for a keyed blend shader. Depends on is_blend */
+ unsigned blend_rt;
+
/* Tracking for blend constant patching */
int blend_constant_offset;
diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c
index 6575771edf7..5b018d86e50 100644
--- a/src/panfrost/midgard/midgard_compile.c
+++ b/src/panfrost/midgard/midgard_compile.c
@@ -1607,9 +1607,9 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
splatter.swizzle[1][c] = 0;
emit_mir_instruction(ctx, splatter);
- emit_fragment_store(ctx, expanded, 0);
+ emit_fragment_store(ctx, expanded, ctx->blend_rt);
} else
- emit_fragment_store(ctx, reg, 0);
+ emit_fragment_store(ctx, reg, ctx->blend_rt);
break;
@@ -2433,7 +2433,7 @@ midgard_get_first_tag_from_block(compiler_context *ctx, unsigned block_idx)
}
int
-midgard_compile_shader_nir(nir_shader *nir, midgard_program *program, bool is_blend, unsigned gpu_id)
+midgard_compile_shader_nir(nir_shader *nir, midgard_program *program, bool is_blend, unsigned blend_rt, unsigned gpu_id)
{
struct util_dynarray *compiled = &program->compiled;
@@ -2446,6 +2446,7 @@ midgard_compile_shader_nir(nir_shader *nir, midgard_program *program, bool is_bl
ctx->stage = nir->info.stage;
ctx->is_blend = is_blend;
ctx->alpha_ref = program->alpha_ref;
+ ctx->blend_rt = blend_rt;
ctx->quirks = midgard_get_quirks(gpu_id);
/* Start off with a safe cutoff, allowing usage of all 16 work
diff --git a/src/panfrost/midgard/midgard_compile.h b/src/panfrost/midgard/midgard_compile.h
index ffdaa89d129..9d27c338f4b 100644
--- a/src/panfrost/midgard/midgard_compile.h
+++ b/src/panfrost/midgard/midgard_compile.h
@@ -91,7 +91,7 @@ typedef struct {
} midgard_program;
int
-midgard_compile_shader_nir(nir_shader *nir, midgard_program *program, bool is_blend, unsigned gpu_id);
+midgard_compile_shader_nir(nir_shader *nir, midgard_program *program, bool is_blend, unsigned blend_rt, unsigned gpu_id);
/* NIR options are shared between the standalone compiler and the online
* compiler. Defining it here is the simplest, though maybe not the Right