diff options
| author | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2021-05-20 22:54:51 +0200 |
|---|---|---|
| committer | Marge Bot <eric+marge@anholt.net> | 2021-05-24 08:50:47 +0000 |
| commit | a00be79d804fd30332725ad24b0f05a064b3460a (patch) | |
| tree | a4be23fc55cc037a2e1826ecba330d4d975ce0a5 | |
| parent | ca783612e721bc66af545075d76dc578ddbf7666 (diff) | |
radv: remove small overhead of radv_pipeline_has_ngg()
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4784
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10908>
| -rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 6 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 4 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_private.h | 5 |
3 files changed, 9 insertions, 6 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 1ac322ab18a..d25c1525cc8 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -3054,7 +3054,7 @@ radv_flush_ngg_gs_state(struct radv_cmd_buffer *cmd_buffer) uint32_t ngg_gs_state = 0; uint32_t base_reg; - if (!radv_pipeline_has_gs(pipeline) || !radv_pipeline_has_ngg(pipeline)) + if (!radv_pipeline_has_gs(pipeline) || !pipeline->graphics.is_ngg) return; /* By default NGG GS queries are disabled but they are enabled if the @@ -4378,8 +4378,8 @@ radv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipeline if (cmd_buffer->device->physical_device->rad_info.has_vgt_flush_ngg_legacy_bug && cmd_buffer->state.emitted_pipeline && - radv_pipeline_has_ngg(cmd_buffer->state.emitted_pipeline) && - !radv_pipeline_has_ngg(cmd_buffer->state.pipeline)) { + cmd_buffer->state.emitted_pipeline->graphics.is_ngg && + !cmd_buffer->state.pipeline->graphics.is_ngg) { /* Transitioning from NGG to legacy GS requires * VGT_FLUSH on GFX10 and Sienna Cichlid. VGT_FLUSH * is also emitted at the beginning of IBs when legacy diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 152e6c67f11..cc027585db1 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -142,7 +142,7 @@ radv_pipeline_get_color_blend_state(const VkGraphicsPipelineCreateInfo *pCreateI return NULL; } -bool +static bool radv_pipeline_has_ngg(const struct radv_pipeline *pipeline) { struct radv_shader_variant *variant = NULL; @@ -5481,6 +5481,8 @@ radv_pipeline_init(struct radv_pipeline *pipeline, struct radv_device *device, /* Find the last vertex shader stage that eventually uses streamout. */ pipeline->streamout_shader = radv_pipeline_get_streamout_shader(pipeline); + pipeline->graphics.is_ngg = radv_pipeline_has_ngg(pipeline); + radv_pipeline_generate_pm4(pipeline, pCreateInfo, extra, &blend); return result; diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index ee672204efa..ba744a22e34 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1740,6 +1740,9 @@ struct radv_pipeline { /* Used for rbplus */ uint32_t col_format; uint32_t cb_target_mask; + + /* Whether the pipeline uses NGG (GFX10+). */ + bool is_ngg; } graphics; }; @@ -1765,8 +1768,6 @@ radv_pipeline_has_tess(const struct radv_pipeline *pipeline) return pipeline->shaders[MESA_SHADER_TESS_CTRL] ? true : false; } -bool radv_pipeline_has_ngg(const struct radv_pipeline *pipeline); - bool radv_pipeline_has_ngg_passthrough(const struct radv_pipeline *pipeline); bool radv_pipeline_has_gs_copy_shader(const struct radv_pipeline *pipeline); |