diff options
| author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2018-10-24 11:33:53 -0700 |
|---|---|---|
| committer | Anuj Phogat <anuj.phogat@gmail.com> | 2018-11-02 08:34:33 -0700 |
| commit | 9a41a10f8aa0d93adefc14ad1b7235a6b7b35d4f (patch) | |
| tree | 522511d5c3b881e74a5681ed33b3a382be084803 | |
| parent | 9cab8ccd6cb5aa8a4748dd6d7fc15d9747624df6 (diff) | |
i965/icl: Disable prefetching of sampler state entries
In the same spirit as commit a5889d70f2074201ceaeac4f96a9a0c0b1f68a31
"i965/icl: Disable binding table prefetching". Fixes some 110+
intermittent piglit failures with tex-miplevel-selection variants.
WA_1606682166:
Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes.
Disable the Sampler state prefetch functionality in the SARB by
programming 0xB000[30] to '1'. This is to be done at boot time and
the feature must remain disabled permanently.
Anuj: Set SamplerCount = 0 for vs, gs, hs, ds and wm units as well.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
| -rw-r--r-- | src/mesa/drivers/dri/i965/genX_state_upload.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index 9cd017a5cff..5acd0922922 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -2004,7 +2004,8 @@ genX(upload_wm)(struct brw_context *brw) if (wm_prog_data->base.use_alt_mode) wm.FloatingPointMode = FLOATING_POINT_MODE_Alternate; - wm.SamplerCount = GEN_GEN == 5 ? + /* WA_1606682166 */ + wm.SamplerCount = (GEN_GEN == 5 || GEN_GEN == 11) ? 0 : DIV_ROUND_UP(stage_state->sampler_count, 4); wm.BindingTableEntryCount = @@ -2166,7 +2167,10 @@ static const struct brw_tracked_state genX(wm_state) = { #define INIT_THREAD_DISPATCH_FIELDS(pkt, prefix) \ pkt.KernelStartPointer = KSP(brw, stage_state->prog_offset); \ + /* WA_1606682166 */ \ pkt.SamplerCount = \ + GEN_GEN == 11 ? \ + 0 : \ DIV_ROUND_UP(CLAMP(stage_state->sampler_count, 0, 16), 4); \ /* Gen 11 workarounds table #2056 WABTPPrefetchDisable suggests to \ * disable prefetching of binding tables in A0 and B0 steppings. \ @@ -3997,8 +4001,13 @@ genX(upload_ps)(struct brw_context *brw) */ ps.VectorMaskEnable = GEN_GEN >= 8; - ps.SamplerCount = - DIV_ROUND_UP(CLAMP(stage_state->sampler_count, 0, 16), 4); + /* WA_1606682166: + * "Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes. + * Disable the Sampler state prefetch functionality in the SARB by + * programming 0xB000[30] to '1'." + */ + ps.SamplerCount = GEN_GEN == 11 ? + 0 : DIV_ROUND_UP(CLAMP(stage_state->sampler_count, 0, 16), 4); /* BRW_NEW_FS_PROG_DATA */ /* Gen 11 workarounds table #2056 WABTPPrefetchDisable suggests to disable |