diff options
| author | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2021-02-24 13:05:26 +0100 |
|---|---|---|
| committer | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2021-02-25 08:17:27 +0100 |
| commit | 8a47422d9778056b2263d5f253fab49dfed91486 (patch) | |
| tree | e34a71cedbfb262098368a33e7e8dccbfa0e483b | |
| parent | 9af40b824d3c6310f6a849bf295170b54aafee08 (diff) | |
radv: do not scale the depth bias for D16_UNORM depth surfaces
Scaling the depth bias doesn't seem correct with Vulkan. This is
probably the root cause of the shadow artifacts differences between
RADV and AMDVLK/AMDGPU-PRO.
Fix dEQP-VK.rasterization.depth_bias.d16_unorm.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2217
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9249>
| -rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 11 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 3 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_private.h | 2 |
3 files changed, 2 insertions, 14 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 3e701f35f58..4193afb5d80 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1470,16 +1470,14 @@ radv_emit_depth_bias(struct radv_cmd_buffer *cmd_buffer) { struct radv_dynamic_state *d = &cmd_buffer->state.dynamic; unsigned slope = fui(d->depth_bias.slope * 16.0f); - unsigned bias = fui(d->depth_bias.bias * cmd_buffer->state.offset_scale); - radeon_set_context_reg_seq(cmd_buffer->cs, R_028B7C_PA_SU_POLY_OFFSET_CLAMP, 5); radeon_emit(cmd_buffer->cs, fui(d->depth_bias.clamp)); /* CLAMP */ radeon_emit(cmd_buffer->cs, slope); /* FRONT SCALE */ - radeon_emit(cmd_buffer->cs, bias); /* FRONT OFFSET */ + radeon_emit(cmd_buffer->cs, fui(d->depth_bias.bias)); /* FRONT OFFSET */ radeon_emit(cmd_buffer->cs, slope); /* BACK SCALE */ - radeon_emit(cmd_buffer->cs, bias); /* BACK OFFSET */ + radeon_emit(cmd_buffer->cs, fui(d->depth_bias.bias)); /* BACK OFFSET */ } static void @@ -2418,11 +2416,6 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer) radv_emit_fb_ds_state(cmd_buffer, &cmd_buffer->state.attachments[idx].ds, iview, layout, in_render_loop); - if (cmd_buffer->state.attachments[idx].ds.offset_scale != cmd_buffer->state.offset_scale) { - cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS; - cmd_buffer->state.offset_scale = cmd_buffer->state.attachments[idx].ds.offset_scale; - } - if (radv_layout_is_htile_compressed(cmd_buffer->device, iview->image, layout, in_render_loop, radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index, diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 9513fb3b277..deef3834380 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -7083,18 +7083,15 @@ radv_initialise_ds_surface(struct radv_device *device, case VK_FORMAT_D24_UNORM_S8_UINT: case VK_FORMAT_X8_D24_UNORM_PACK32: ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-24); - ds->offset_scale = 2.0f; break; case VK_FORMAT_D16_UNORM: case VK_FORMAT_D16_UNORM_S8_UINT: ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-16); - ds->offset_scale = 4.0f; break; case VK_FORMAT_D32_SFLOAT: case VK_FORMAT_D32_SFLOAT_S8_UINT: ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-23) | S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1); - ds->offset_scale = 1.0f; break; case VK_FORMAT_S8_UINT: stencil_only = true; diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index c0902618997..45677e4018a 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1232,7 +1232,6 @@ struct radv_ds_buffer_info { uint32_t pa_su_poly_offset_db_fmt_cntl; uint32_t db_z_info2; /* GFX9 only */ uint32_t db_stencil_info2; /* GFX9 only */ - float offset_scale; }; void @@ -1339,7 +1338,6 @@ struct radv_cmd_state { bool perfect_occlusion_queries_enabled; unsigned active_pipeline_queries; unsigned active_pipeline_gds_queries; - float offset_scale; uint32_t trace_id; uint32_t last_ia_multi_vgt_param; |