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authorMarek Olšák <marek.olsak@amd.com>2021-03-17 14:42:44 -0400
committerMarge Bot <eric+marge@anholt.net>2021-03-19 16:05:03 +0000
commit88e0e4f70efa51417e7f600dd774b878a553a7ba (patch)
tree92c96ca3c711be585460a4fe37d409dc9c74af00
parente3e66e1fab0286715b7d8b3130e2ffc2b44dda11 (diff)
radeonsi: select the optimal micro tile mode at clear regardless of fast clear
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9615>
-rw-r--r--src/gallium/drivers/radeonsi/si_clear.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 6394eeb277a..e3bb69cef6c 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -415,6 +415,10 @@ static void si_do_fast_color_clear(struct si_context *sctx, unsigned *buffers,
continue;
}
+ /* We can change the micro tile mode before a full clear. */
+ /* This is only used for MSAA textures when clearing all layers. */
+ si_set_optimal_micro_tile_mode(sctx->screen, tex);
+
/* only supported on tiled surfaces */
if (tex->surface.is_linear) {
continue;
@@ -527,9 +531,6 @@ static void si_do_fast_color_clear(struct si_context *sctx, unsigned *buffers,
p_atomic_inc(&sctx->screen->compressed_colortex_counter);
}
- /* We can change the micro tile mode before a full clear. */
- si_set_optimal_micro_tile_mode(sctx->screen, tex);
-
*buffers &= ~clear_bit;
/* Chips with DCC constant encoding don't need to set the clear