r600g: fix eg texture borders.

texture border regs are indexed on evergreen.

4 files changed, 35 insertions, 28 deletions

diff --git a/src/gallium/drivers/r600/eg_hw_states.c b/src/gallium/drivers/r600/eg_hw_states.c
index 1d3a3e11c10..3d10095919a 100644
--- a/src/gallium/drivers/r600/eg_hw_states.c
+++ b/src/gallium/drivers/r600/eg_hw_states.c
@@ -471,6 +471,7 @@ static void eg_sampler_border(struct r600_context *rctx, struct radeon_state *rs
 
 	radeon_state_init(rstate, rscreen->rw, R600_STATE_SAMPLER_BORDER, id, R600_SHADER_PS);
 	if (uc.ui) {
+	        rstate->states[EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_INDEX] = id;
 		rstate->states[EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_RED] = fui(state->border_color[0]);
 		rstate->states[EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_GREEN] = fui(state->border_color[1]);
 		rstate->states[EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_BLUE] = fui(state->border_color[2]);
diff --git a/src/gallium/drivers/r600/eg_states_inc.h b/src/gallium/drivers/r600/eg_states_inc.h
index 462f31cc798..9f8007c8e91 100644
--- a/src/gallium/drivers/r600/eg_states_inc.h
+++ b/src/gallium/drivers/r600/eg_states_inc.h
@@ -368,27 +368,30 @@
 #define EG_GS_SAMPLER_PM4 128		
 
 /* EG_PS_SAMPLER_BORDER */
-#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_RED		0
-#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_GREEN		1
-#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_BLUE		2
-#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_ALPHA		3
-#define EG_PS_SAMPLER_BORDER_SIZE		4
+#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_INDEX		0
+#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_RED		1
+#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_GREEN		2
+#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_BLUE		3
+#define EG_PS_SAMPLER_BORDER__TD_PS_SAMPLER0_BORDER_ALPHA		4
+#define EG_PS_SAMPLER_BORDER_SIZE		5
 #define EG_PS_SAMPLER_BORDER_PM4 128		
 
 /* EG_VS_SAMPLER_BORDER */
-#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_RED		0
-#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_GREEN		1
-#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_BLUE		2
-#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_ALPHA		3
-#define EG_VS_SAMPLER_BORDER_SIZE		4
+#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_INDEX		0
+#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_RED		1
+#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_GREEN		2
+#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_BLUE		3
+#define EG_VS_SAMPLER_BORDER__TD_VS_SAMPLER0_BORDER_ALPHA		4
+#define EG_VS_SAMPLER_BORDER_SIZE		5
 #define EG_VS_SAMPLER_BORDER_PM4 128		
 
 /* EG_GS_SAMPLER_BORDER */
-#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_RED		0
-#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_GREEN		1
-#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_BLUE		2
-#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_ALPHA		3
-#define EG_GS_SAMPLER_BORDER_SIZE		4
+#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_INDEX		0
+#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_RED		1
+#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_GREEN		2
+#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_BLUE		3
+#define EG_GS_SAMPLER_BORDER__TD_GS_SAMPLER0_BORDER_ALPHA		4
+#define EG_GS_SAMPLER_BORDER_SIZE		5
 #define EG_GS_SAMPLER_BORDER_PM4 128		
 
 /* EG_CB */
diff --git a/src/gallium/winsys/r600/drm/eg_states.h b/src/gallium/winsys/r600/drm/eg_states.h
index c26ba6c6cd0..518e05fefbb 100644
--- a/src/gallium/winsys/r600/drm/eg_states.h
+++ b/src/gallium/winsys/r600/drm/eg_states.h
@@ -371,24 +371,27 @@ static const struct radeon_register EG_names_GS_SAMPLER[] = {
 };
 
 static const struct radeon_register EG_names_PS_SAMPLER_BORDER[] = {
-	{0x0000A400, 0, 0, "TD_PS_SAMPLER0_BORDER_RED"},
-	{0x0000A404, 0, 0, "TD_PS_SAMPLER0_BORDER_GREEN"},
-	{0x0000A408, 0, 0, "TD_PS_SAMPLER0_BORDER_BLUE"},
-	{0x0000A40C, 0, 0, "TD_PS_SAMPLER0_BORDER_ALPHA"},
+	{0x0000A400, 0, 0, "TD_PS_SAMPLER0_BORDER_INDEX"},
+	{0x0000A404, 0, 0, "TD_PS_SAMPLER0_BORDER_RED"},
+	{0x0000A408, 0, 0, "TD_PS_SAMPLER0_BORDER_GREEN"},
+	{0x0000A40C, 0, 0, "TD_PS_SAMPLER0_BORDER_BLUE"},
+	{0x0000A410, 0, 0, "TD_PS_SAMPLER0_BORDER_ALPHA"},
 };
 
 static const struct radeon_register EG_names_VS_SAMPLER_BORDER[] = {
-	{0x0000A600, 0, 0, "TD_VS_SAMPLER0_BORDER_RED"},
-	{0x0000A604, 0, 0, "TD_VS_SAMPLER0_BORDER_GREEN"},
-	{0x0000A608, 0, 0, "TD_VS_SAMPLER0_BORDER_BLUE"},
-	{0x0000A60C, 0, 0, "TD_VS_SAMPLER0_BORDER_ALPHA"},
+	{0x0000A414, 0, 0, "TD_VS_SAMPLER0_BORDER_INDEX"},
+	{0x0000A418, 0, 0, "TD_VS_SAMPLER0_BORDER_RED"},
+	{0x0000A41C, 0, 0, "TD_VS_SAMPLER0_BORDER_GREEN"},
+	{0x0000A420, 0, 0, "TD_VS_SAMPLER0_BORDER_BLUE"},
+	{0x0000A424, 0, 0, "TD_VS_SAMPLER0_BORDER_ALPHA"},
 };
 
 static const struct radeon_register EG_names_GS_SAMPLER_BORDER[] = {
-	{0x0000A800, 0, 0, "TD_GS_SAMPLER0_BORDER_RED"},
-	{0x0000A804, 0, 0, "TD_GS_SAMPLER0_BORDER_GREEN"},
-	{0x0000A808, 0, 0, "TD_GS_SAMPLER0_BORDER_BLUE"},
-	{0x0000A80C, 0, 0, "TD_GS_SAMPLER0_BORDER_ALPHA"},
+	{0x0000A428, 0, 0, "TD_GS_SAMPLER0_BORDER_INDEX"},
+	{0x0000A42C, 0, 0, "TD_GS_SAMPLER0_BORDER_RED"},
+	{0x0000A430, 0, 0, "TD_GS_SAMPLER0_BORDER_GREEN"},
+	{0x0000A434, 0, 0, "TD_GS_SAMPLER0_BORDER_BLUE"},
+	{0x0000A438, 0, 0, "TD_GS_SAMPLER0_BORDER_ALPHA"},
 };
 
 static const struct radeon_register EG_names_CB[] = {
diff --git a/src/gallium/winsys/r600/drm/r600_state.c b/src/gallium/winsys/r600/drm/r600_state.c
index a4739021c4c..25dd8fe7d81 100644
--- a/src/gallium/winsys/r600/drm/r600_state.c
+++ b/src/gallium/winsys/r600/drm/r600_state.c
@@ -110,7 +110,7 @@ struct radeon_stype_info eg_stypes[] = {
 	{ R600_STATE_CBUF, 1, 0, r600_state_pm4_shader, { EG_SUB_PS(PS_CBUF), EG_SUB_VS(VS_CBUF) } },
 	{ R600_STATE_RESOURCE, 176, 0x20, r600_state_pm4_resource, { EG_SUB_PS(PS_RESOURCE), EG_SUB_VS(VS_RESOURCE), EG_SUB_GS(GS_RESOURCE), EG_SUB_FS(FS_RESOURCE)} },
 	{ R600_STATE_SAMPLER, 18, 0xc, r600_state_pm4_generic, { EG_SUB_PS(PS_SAMPLER), EG_SUB_VS(VS_SAMPLER), EG_SUB_GS(GS_SAMPLER) } },
-	{ R600_STATE_SAMPLER_BORDER, 18, 0x10, r600_state_pm4_generic, { EG_SUB_PS(PS_SAMPLER_BORDER), EG_SUB_VS(VS_SAMPLER_BORDER), EG_SUB_GS(GS_SAMPLER_BORDER) } },
+	{ R600_STATE_SAMPLER_BORDER, 18, 0, r600_state_pm4_generic, { EG_SUB_PS(PS_SAMPLER_BORDER), EG_SUB_VS(VS_SAMPLER_BORDER), EG_SUB_GS(GS_SAMPLER_BORDER) } },
 	{ R600_STATE_CB0, 11, 0x3c, r600_state_pm4_generic, EG_SUB_NONE(CB) },
 	{ R600_STATE_QUERY_BEGIN, 1, 0, r600_state_pm4_query_begin, EG_SUB_NONE(VGT_EVENT) },
 	{ R600_STATE_QUERY_END, 1, 0, r600_state_pm4_query_end, EG_SUB_NONE(VGT_EVENT) },