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authorChad Versace <chad.versace@linux.intel.com>2013-03-19 17:44:50 -0700
committerChad Versace <chad.versace@linux.intel.com>2013-04-10 10:55:10 -0700
commit87f4541bc1007dda1e345c16db94672620bc8fb2 (patch)
treea3a0b0b9f19306e5278f254e2c0f306501b7c87f
parent2a416a9b1b1516200c9c704663022d4b17dca302 (diff)
i965/blorp: Add fields brw_blorp_mip_info::level,layer
The new fields define the 2D miptree slice to be used. A following patch will pass the new fields through to intel_miptree_slice_has_hiz(). Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.cpp4
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.h11
2 files changed, 15 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index ed966c6353f..9c6fe498e84 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -30,6 +30,8 @@
brw_blorp_mip_info::brw_blorp_mip_info()
: mt(NULL),
+ level(0),
+ layer(0),
width(0),
height(0),
x_offset(0),
@@ -50,6 +52,8 @@ brw_blorp_mip_info::set(struct intel_mipmap_tree *mt,
intel_miptree_check_level_layer(mt, level, layer);
this->mt = mt;
+ this->level = level;
+ this->layer = layer;
this->width = mt->level[level].width;
this->height = mt->level[level].height;
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index 79a3f3ae79f..1b958182483 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -69,6 +69,17 @@ public:
struct intel_mipmap_tree *mt;
/**
+ * The miplevel to use.
+ */
+ uint32_t level;
+
+ /**
+ * The 2D layer within the miplevel. Combined, level and layer define the
+ * 2D miptree slice to use.
+ */
+ uint32_t layer;
+
+ /**
* Width of the miplevel to be used. For surfaces using
* INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
*/