radeon: derive radeon_renderbuffer from swrast_renderbuffer

(cherry picked from commit c080202db5363a18a759a9a7c82b40ac558c8abe)

14 files changed, 73 insertions, 64 deletions

diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index 49f66fb6f46..5677a9e7b8f 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -1619,8 +1619,8 @@ void r200_vtbl_update_scissor( struct gl_context *ctx )
       rrb = radeon_get_colorbuffer(&r200->radeon);
       x1 = 0;
       y1 = 0;
-      x2 = rrb->base.Width - 1;
-      y2 = rrb->base.Height - 1;
+      x2 = rrb->base.Base.Width - 1;
+      y2 = rrb->base.Base.Height - 1;
    }
 
    R200_SET_STATE(r200, sci, SCI_XY_1, x1 | (y1 << 16));
diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
index ab4a188d4c1..bddecaf2c2d 100644
--- a/src/mesa/drivers/dri/r200/r200_state_init.c
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c
@@ -451,7 +451,7 @@ static void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom)
    atom->cmd[CTX_RB3D_CNTL] &= ~(0xf << 10);
    if (rrb->cpp == 4)
 	atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB8888;
-   else switch (rrb->base.Format) {
+   else switch (rrb->base.Base.Format) {
    case MESA_FORMAT_RGB565:
 	atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_RGB565;
 	break;
diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c
index 4624b089327..19e77c57fc3 100644
--- a/src/mesa/drivers/dri/r200/r200_texstate.c
+++ b/src/mesa/drivers/dri/r200/r200_texstate.c
@@ -807,13 +807,14 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_format
 	}
 
 	_mesa_init_teximage_fields(radeon->glCtx, texImage,
-				   rb->base.Width, rb->base.Height, 1, 0,
+				   rb->base.Base.Width, rb->base.Base.Height,
+				   1, 0,
 				   rb->cpp, texFormat);
 	rImage->base.RowStride = rb->pitch / rb->cpp;
 
 
-        t->pp_txsize = ((rb->base.Width - 1) << RADEON_TEX_USIZE_SHIFT)
-		   | ((rb->base.Height - 1) << RADEON_TEX_VSIZE_SHIFT);
+        t->pp_txsize = ((rb->base.Base.Width - 1) << RADEON_TEX_USIZE_SHIFT)
+		   | ((rb->base.Base.Height - 1) << RADEON_TEX_VSIZE_SHIFT);
 
 	if (target == GL_TEXTURE_RECTANGLE_NV) {
 		t->pp_txformat |= R200_TXFORMAT_NON_POWER2;
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index bb9cb2aa6a2..b64ff8160d0 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -364,8 +364,8 @@ void radeon_draw_buffer(struct gl_context *ctx, struct gl_framebuffer *fb)
 		ctx->NewState |= (_NEW_DEPTH | _NEW_STENCIL);
 	}
 
-	_mesa_reference_renderbuffer(&radeon->state.depth.rb, &rrbDepth->base);
-	_mesa_reference_renderbuffer(&radeon->state.color.rb, &rrbColor->base);
+	_mesa_reference_renderbuffer(&radeon->state.depth.rb, &rrbDepth->base.Base);
+	_mesa_reference_renderbuffer(&radeon->state.color.rb, &rrbColor->base.Base);
 	radeon->state.color.draw_offset = offset;
 
 #if 0
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h
index 24cba34c4da..6f9b5b9a408 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common.h
@@ -45,7 +45,7 @@ static inline struct radeon_renderbuffer *radeon_renderbuffer(struct gl_renderbu
 	radeon_print(RADEON_MEMORY, RADEON_TRACE,
 		"%s(rb %p)\n",
 		__func__, (void *) rb);
-	if (rrb && rrb->base.ClassID == RADEON_RB_CLASS)
+	if (rrb && rrb->base.Base.ClassID == RADEON_RB_CLASS)
 		return rrb;
 	else
 		return NULL;
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index ceaefdad91c..b5fe7cdd049 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -294,7 +294,7 @@ GLboolean radeonUnbindContext(__DRIcontext * driContextPriv)
 static unsigned
 radeon_bits_per_pixel(const struct radeon_renderbuffer *rb)
 {
-   return _mesa_get_format_bytes(rb->base.Format) * 8; 
+   return _mesa_get_format_bytes(rb->base.Base.Format) * 8; 
 }
 
 /*
@@ -484,8 +484,8 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable,
 
 		rb->cpp = buffers[i].cpp;
 		rb->pitch = buffers[i].pitch;
-		rb->base.Width = drawable->w;
-		rb->base.Height = drawable->h;
+		rb->base.Base.Width = drawable->w;
+		rb->base.Base.Height = drawable->h;
 		rb->has_surface = 0;
 
 		if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_bo) {
@@ -602,9 +602,9 @@ GLboolean radeonMakeCurrent(__DRIcontext * driContextPriv,
 	if (driDrawPriv != driReadPriv)
 	   radeon_update_renderbuffers(driContextPriv, driReadPriv, GL_FALSE);
 	_mesa_reference_renderbuffer(&radeon->state.color.rb,
-		&(radeon_get_renderbuffer(drfb, BUFFER_BACK_LEFT)->base));
+		&(radeon_get_renderbuffer(drfb, BUFFER_BACK_LEFT)->base.Base));
 	_mesa_reference_renderbuffer(&radeon->state.depth.rb,
-		&(radeon_get_renderbuffer(drfb, BUFFER_DEPTH)->base));
+		&(radeon_get_renderbuffer(drfb, BUFFER_DEPTH)->base.Base));
 
 	if (RADEON_DEBUG & RADEON_DRI)
 	     fprintf(stderr, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__, radeon->glCtx, drfb, readfb);
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index 1fa75474a02..80ae2d1e380 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -80,7 +80,8 @@ typedef struct radeon_context *radeonContextPtr;
 
 struct radeon_renderbuffer
 {
-	struct gl_renderbuffer base;
+	struct swrast_renderbuffer base;
+
 	struct radeon_bo *bo;
 	unsigned int cpp;
 	/* unsigned int offset; */
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 026587c1bab..9032a323a3f 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -263,7 +263,7 @@ radeon_map_renderbuffer(struct gl_context *ctx,
 	   src_y = y;
        } else {
 	   src_x = x;
-	   src_y = rrb->base.Height - y - h;
+	   src_y = rrb->base.Base.Height - y - h;
        }
 
        /* Make a temporary buffer and blit the current contents of the renderbuffer
@@ -645,7 +645,7 @@ radeon_resize_buffers(struct gl_context *ctx, struct gl_framebuffer *fb,
 
    /* Make sure all window system renderbuffers are up to date */
    for (i = 0; i < 2; i++) {
-      struct gl_renderbuffer *rb = &radeon_fb->color_rb[i]->base;
+      struct gl_renderbuffer *rb = &radeon_fb->color_rb[i]->base.Base;
 
       /* only resize if size is changing */
       if (rb && (rb->Width != width || rb->Height != height)) {
@@ -673,6 +673,7 @@ struct radeon_renderbuffer *
 radeon_create_renderbuffer(gl_format format, __DRIdrawable *driDrawPriv)
 {
     struct radeon_renderbuffer *rrb;
+    struct gl_renderbuffer *rb;
 
     rrb = CALLOC_STRUCT(radeon_renderbuffer);
 
@@ -683,18 +684,18 @@ radeon_create_renderbuffer(gl_format format, __DRIdrawable *driDrawPriv)
     if (!rrb)
 	return NULL;
 
-    _mesa_init_renderbuffer(&rrb->base, 0);
-    rrb->base.ClassID = RADEON_RB_CLASS;
+    rb = &rrb->base.Base;
 
-    rrb->base.Format = format;
-
-    rrb->base._BaseFormat = _mesa_get_format_base_format(format);
+    _mesa_init_renderbuffer(rb, 0);
+    rb->ClassID = RADEON_RB_CLASS;
+    rb->Format = format;
+    rb->_BaseFormat = _mesa_get_format_base_format(format);
+    rb->InternalFormat = _mesa_get_format_base_format(format);
 
     rrb->dPriv = driDrawPriv;
-    rrb->base.InternalFormat = _mesa_get_format_base_format(format);
 
-    rrb->base.Delete = radeon_delete_renderbuffer;
-    rrb->base.AllocStorage = radeon_alloc_window_storage;
+    rb->Delete = radeon_delete_renderbuffer;
+    rb->AllocStorage = radeon_alloc_window_storage;
 
     rrb->bo = NULL;
     return rrb;
@@ -704,6 +705,8 @@ static struct gl_renderbuffer *
 radeon_new_renderbuffer(struct gl_context * ctx, GLuint name)
 {
   struct radeon_renderbuffer *rrb;
+  struct gl_renderbuffer *rb;
+
 
   rrb = CALLOC_STRUCT(radeon_renderbuffer);
 
@@ -714,13 +717,14 @@ radeon_new_renderbuffer(struct gl_context * ctx, GLuint name)
   if (!rrb)
     return NULL;
 
-  _mesa_init_renderbuffer(&rrb->base, name);
-  rrb->base.ClassID = RADEON_RB_CLASS;
+  rb = &rrb->base.Base;
 
-  rrb->base.Delete = radeon_delete_renderbuffer;
-  rrb->base.AllocStorage = radeon_alloc_renderbuffer_storage;
+  _mesa_init_renderbuffer(rb, name);
+  rb->ClassID = RADEON_RB_CLASS;
+  rb->Delete = radeon_delete_renderbuffer;
+  rb->AllocStorage = radeon_alloc_renderbuffer_storage;
 
-  return &rrb->base;
+  return rb;
 }
 
 static void
@@ -761,19 +765,21 @@ static GLboolean
 radeon_update_wrapper(struct gl_context *ctx, struct radeon_renderbuffer *rrb, 
 		     struct gl_texture_image *texImage)
 {
+	struct gl_renderbuffer *rb = &rrb->base.Base;
+
 	radeon_print(RADEON_TEXTURE, RADEON_TRACE,
 		"%s(%p, rrb %p, texImage %p, texFormat %s) \n",
 		__func__, ctx, rrb, texImage, _mesa_get_format_name(texImage->TexFormat));
 
 	rrb->cpp = _mesa_get_format_bytes(texImage->TexFormat);
 	rrb->pitch = texImage->Width * rrb->cpp;
-	rrb->base.Format = texImage->TexFormat;
-	rrb->base.InternalFormat = texImage->InternalFormat;
-	rrb->base._BaseFormat = _mesa_base_fbo_format(ctx, rrb->base.InternalFormat);
-	rrb->base.Width = texImage->Width;
-	rrb->base.Height = texImage->Height;
-	rrb->base.Delete = radeon_delete_renderbuffer;
-	rrb->base.AllocStorage = radeon_nop_alloc_storage;
+	rb->Format = texImage->TexFormat;
+	rb->InternalFormat = texImage->InternalFormat;
+	rb->_BaseFormat = _mesa_base_fbo_format(ctx, rb->InternalFormat);
+	rb->Width = texImage->Width;
+	rb->Height = texImage->Height;
+	rb->Delete = radeon_delete_renderbuffer;
+	rb->AllocStorage = radeon_nop_alloc_storage;
 
 	return GL_TRUE;
 }
@@ -797,8 +803,8 @@ radeon_wrap_texture(struct gl_context * ctx, struct gl_texture_image *texImage)
       return NULL;
    }
 
-   _mesa_init_renderbuffer(&rrb->base, name);
-   rrb->base.ClassID = RADEON_RB_CLASS;
+   _mesa_init_renderbuffer(&rrb->base.Base, name);
+   rrb->base.Base.ClassID = RADEON_RB_CLASS;
 
    if (!radeon_update_wrapper(ctx, rrb, texImage)) {
       free(rrb);
@@ -840,7 +846,7 @@ radeon_render_texture(struct gl_context * ctx,
       rrb = radeon_wrap_texture(ctx, newImage);
       if (rrb) {
          /* bind the wrapper to the attachment point */
-         _mesa_reference_renderbuffer(&att->Renderbuffer, &rrb->base);
+         _mesa_reference_renderbuffer(&att->Renderbuffer, &rrb->base.Base);
       }
       else {
          /* fallback to software rendering */
@@ -858,7 +864,7 @@ radeon_render_texture(struct gl_context * ctx,
    DBG("Begin render texture tid %lx tex=%u w=%d h=%d refcount=%d\n",
        _glthread_GetID(),
        att->Texture->Name, newImage->Width, newImage->Height,
-       rrb->base.RefCount);
+       rrb->base.Base.RefCount);
 
    /* point the renderbufer's region to the texture image region */
    if (rrb->bo != radeon_image->mt->bo) {
diff --git a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
index 68e3114989d..3a14cc69af4 100644
--- a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
+++ b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
@@ -150,17 +150,17 @@ do_blit_readpixels(struct gl_context * ctx,
     /* Disable source Y flipping for FBOs */
     flip_y = (ctx->ReadBuffer->Name == 0);
     if (pack->Invert) {
-        y = rrb->base.Height - height - y;
+        y = rrb->base.Base.Height - height - y;
         flip_y = !flip_y;
     }
 
     if (radeon->vtbl.blit(ctx,
                           rrb->bo,
                           rrb->draw_offset,
-                          rrb->base.Format,
+                          rrb->base.Base.Format,
                           rrb->pitch / rrb->cpp,
-                          rrb->base.Width,
-                          rrb->base.Height,
+                          rrb->base.Base.Width,
+                          rrb->base.Base.Height,
                           x,
                           y,
                           dst_buffer,
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 51a1ef54ec1..76c23eb2ea6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -620,13 +620,13 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv,
 
     /* front color renderbuffer */
     rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
-    _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base);
+    _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base.Base);
     rfb->color_rb[0]->has_surface = 1;
 
     /* back color renderbuffer */
     if (mesaVis->doubleBufferMode) {
       rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
-	_mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base);
+	_mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base.Base);
 	rfb->color_rb[1]->has_surface = 1;
     }
 
@@ -634,21 +634,21 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv,
       if (mesaVis->stencilBits == 8) {
 	struct radeon_renderbuffer *depthStencilRb =
            radeon_create_renderbuffer(MESA_FORMAT_S8_Z24, driDrawPriv);
-	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base);
-	_mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base);
+	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base);
+	_mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base);
 	depthStencilRb->has_surface = screen->depthHasSurface;
       } else {
 	/* depth renderbuffer */
 	struct radeon_renderbuffer *depth =
            radeon_create_renderbuffer(MESA_FORMAT_X8_Z24, driDrawPriv);
-	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base);
+	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 	depth->has_surface = screen->depthHasSurface;
       }
     } else if (mesaVis->depthBits == 16) {
         /* just 16-bit depth buffer, no hw stencil */
 	struct radeon_renderbuffer *depth =
            radeon_create_renderbuffer(MESA_FORMAT_Z16, driDrawPriv);
-	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base);
+	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 	depth->has_surface = screen->depthHasSurface;
     }
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c
index 6588ae82494..1f2ba494241 100644
--- a/src/mesa/drivers/dri/radeon/radeon_span.c
+++ b/src/mesa/drivers/dri/radeon/radeon_span.c
@@ -64,8 +64,8 @@ radeon_renderbuffer_map(struct gl_context *ctx, struct gl_renderbuffer *rb)
 				    GL_MAP_READ_BIT | GL_MAP_WRITE_BIT,
 				    &map, &stride);
 
-	rb->Map = map;
-	rb->RowStrideBytes = stride;
+	rrb->base.Map = map;
+	rrb->base.RowStride = stride;
 }
 
 static void
@@ -77,8 +77,8 @@ radeon_renderbuffer_unmap(struct gl_context *ctx, struct gl_renderbuffer *rb)
 
 	ctx->Driver.UnmapRenderbuffer(ctx, rb);
 
-	rb->Map = NULL;
-	rb->RowStrideBytes = 0;
+	rrb->base.Map = NULL;
+	rrb->base.RowStride = 0;
 }
 
 static void
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
index 8edba6ec9de..151f4f5145a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
@@ -334,7 +334,7 @@ static void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom)
    atom->cmd[CTX_RB3D_CNTL] &= ~(0xf << 10);
    if (rrb->cpp == 4)
 	atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB8888;
-   else switch (rrb->base.Format) {
+   else switch (rrb->base.Base.Format) {
    case MESA_FORMAT_RGB565:
 	atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_RGB565;
 	break;
@@ -404,8 +404,8 @@ static void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom)
    OUT_BATCH(0);
    OUT_BATCH(CP_PACKET0(RADEON_RE_WIDTH_HEIGHT, 0));
    if (rrb) {
-       OUT_BATCH(((rrb->base.Width - 1) << RADEON_RE_WIDTH_SHIFT) |
-                 ((rrb->base.Height - 1) << RADEON_RE_HEIGHT_SHIFT));
+       OUT_BATCH(((rrb->base.Base.Width - 1) << RADEON_RE_WIDTH_SHIFT) |
+                 ((rrb->base.Base.Height - 1) << RADEON_RE_HEIGHT_SHIFT));
    } else {
        OUT_BATCH(0);
    }
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index 726692ef241..a26acbfdd04 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -89,12 +89,12 @@ do_copy_texsubimage(struct gl_context *ctx,
                 __FUNCTION__, face, level);
         fprintf(stderr, "to: x %d, y %d, offset %d\n", dstx, dsty, (uint32_t) dst_offset);
         fprintf(stderr, "from (%dx%d) width %d, height %d, offset %d, pitch %d\n",
-                x, y, rrb->base.Width, rrb->base.Height, (uint32_t) src_offset, rrb->pitch/rrb->cpp);
+                x, y, rrb->base.Base.Width, rrb->base.Base.Height, (uint32_t) src_offset, rrb->pitch/rrb->cpp);
         fprintf(stderr, "src size %d, dst size %d\n", rrb->bo->size, timg->mt->bo->size);
 
     }
 
-    src_mesaformat = rrb->base.Format;
+    src_mesaformat = rrb->base.Base.Format;
     dst_mesaformat = timg->base.Base.TexFormat;
     src_bpp = _mesa_get_format_bytes(src_mesaformat);
     dst_bpp = _mesa_get_format_bytes(dst_mesaformat);
@@ -126,7 +126,7 @@ do_copy_texsubimage(struct gl_context *ctx,
 
     /* blit from src buffer to texture */
     return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, rrb->pitch/rrb->cpp,
-                             rrb->base.Width, rrb->base.Height, x, y,
+                             rrb->base.Base.Width, rrb->base.Base.Height, x, y,
                              timg->mt->bo, dst_offset, dst_mesaformat,
                              timg->mt->levels[level].rowstride / dst_bpp,
                              timg->base.Base.Width, timg->base.Base.Height,
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index 67acb73c311..87f12d5179c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -681,15 +681,16 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form
 	}
 
 	_mesa_init_teximage_fields(radeon->glCtx, texImage,
-				   rb->base.Width, rb->base.Height, 1, 0,
+				   rb->base.Base.Width, rb->base.Base.Height,
+				   1, 0,
 				   rb->cpp, texFormat);
 	rImage->base.RowStride = rb->pitch / rb->cpp;
 
 	t->pp_txpitch &= (1 << 13) -1;
 	pitch_val = rb->pitch;
 
-        t->pp_txsize = ((rb->base.Width - 1) << RADEON_TEX_USIZE_SHIFT)
-		| ((rb->base.Height - 1) << RADEON_TEX_VSIZE_SHIFT);
+        t->pp_txsize = ((rb->base.Base.Width - 1) << RADEON_TEX_USIZE_SHIFT)
+		| ((rb->base.Base.Height - 1) << RADEON_TEX_VSIZE_SHIFT);
 	if (target == GL_TEXTURE_RECTANGLE_NV) {
 		t->pp_txformat |= RADEON_TXFORMAT_NON_POWER2;
 		t->pp_txpitch = pitch_val;