diff options
| author | Kenneth Graunke <kenneth@whitecape.org> | 2011-05-13 09:25:27 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2011-05-17 23:33:02 -0700 |
| commit | 7f5e0d2a908d4f7ba781d70731172a07b640f401 (patch) | |
| tree | efc17b88a8962bc7201bba1ac396b58460404761 | |
| parent | 344283de5d3f4e2bfa10455f6b974cf731184b55 (diff) | |
i965: Disable register spilling on Ivybridge for now.
The data port messages for this are rather different. For now, fail to
compile rather than hanging the GPU.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp index 1e2cf917116..f88b1316775 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp @@ -244,6 +244,8 @@ fs_visitor::assign_regs() if (reg == -1) { fail("no register to spill\n"); + } else if (intel->gen >= 7) { + fail("no spilling support on gen7 yet\n"); } else if (c->dispatch_width == 16) { fail("no spilling support on 16-wide yet\n"); } else { |