diff options
| author | Rhys Perry <pendingchaos02@gmail.com> | 2021-01-08 11:44:33 +0000 |
|---|---|---|
| committer | Dylan Baker <dylan.c.baker@intel.com> | 2021-01-12 15:27:34 -0800 |
| commit | 76ecdf2c32280749819b7d566a1503b52fe222f9 (patch) | |
| tree | 7277babd1364184724211ee55224dce302c7e209 | |
| parent | 6a006c35675636cb0d2cbfdfb1681b6639e0664d (diff) | |
aco: fix unreachable() for uniform 8/16-bit nir_op_mov from VGPR
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: d20a752c0de ("aco: use Builder::copy more")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8380>
(cherry picked from commit 816b7fb5cb622dd6c5d0fbcecdcb27779029f80f)
| -rw-r--r-- | .pick_status.json | 2 | ||||
| -rw-r--r-- | src/amd/compiler/aco_instruction_selection.cpp | 10 |
2 files changed, 7 insertions, 5 deletions
diff --git a/.pick_status.json b/.pick_status.json index 31f5ed5aafd..343e5579015 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1705,7 +1705,7 @@ "description": "aco: fix unreachable() for uniform 8/16-bit nir_op_mov from VGPR", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "master_sha": null, "because_sha": "d20a752c0de426e4c7c64a4d42d10f373f73c97a" }, diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index c85d173d43d..6d45407203c 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -1208,12 +1208,14 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr) } case nir_op_mov: { Temp src = get_alu_src(ctx, instr->src[0]); - if (src.bytes() != dst.bytes()) - unreachable("wrong src or dst register class for nir_op_mov"); - if (src.type() == RegType::vgpr && dst.type() == RegType::sgpr) + if (src.type() == RegType::vgpr && dst.type() == RegType::sgpr) { + /* use size() instead of bytes() for 8/16-bit */ + assert(src.size() == dst.size() && "wrong src or dst register class for nir_op_mov"); bld.pseudo(aco_opcode::p_as_uniform, Definition(dst), src); - else + } else { + assert(src.bytes() == dst.bytes() && "wrong src or dst register class for nir_op_mov"); bld.copy(Definition(dst), src); + } break; } case nir_op_inot: { |