diff options
| author | Kenneth Graunke <kenneth@whitecape.org> | 2015-03-29 03:45:16 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2015-04-07 14:34:02 -0700 |
| commit | 73d106822e3d0e851ef1308afff7490007b1af8c (patch) | |
| tree | 4b9dd4f9c47dae3eb358a18e243feb53d9fec1c1 | |
| parent | 60dcd972574b11fa5f29ceb173d4b3ae430e618d (diff) | |
i965: Add the ability to render to I8/L8 and I16/L16 UNORM formats.
This allows those formats to work with the meta PBO upload path.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_surface_formats.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index 7261c012584..7524ad9675d 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -582,6 +582,14 @@ brw_init_surface_formats(struct brw_context *brw) case BRW_SURFACEFORMAT_L16_FLOAT: render = BRW_SURFACEFORMAT_R16_FLOAT; break; + case BRW_SURFACEFORMAT_I8_UNORM: + case BRW_SURFACEFORMAT_L8_UNORM: + render = BRW_SURFACEFORMAT_R8_UNORM; + break; + case BRW_SURFACEFORMAT_I16_UNORM: + case BRW_SURFACEFORMAT_L16_UNORM: + render = BRW_SURFACEFORMAT_R16_UNORM; + break; case BRW_SURFACEFORMAT_B8G8R8X8_UNORM: /* XRGB is handled as ARGB because the chips in this family * cannot render to XRGB targets. This means that we have to |