radeon/vcn/enc: change to per-temporal layer rate control

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>

4 files changed, 55 insertions, 41 deletions

diff --git a/src/gallium/drivers/radeon/radeon_temporal.h b/src/gallium/drivers/radeon/radeon_temporal.h
index 5a294d61066..65daa53dbb3 100644
--- a/src/gallium/drivers/radeon/radeon_temporal.h
+++ b/src/gallium/drivers/radeon/radeon_temporal.h
@@ -29,8 +29,8 @@
 #define _RADEON_TEMPORAL_H
 
 #include "radeon_video.h"
+#include "radeon_vcn_enc.h"
 
-#define RENCODE_MAX_NUM_TEMPORAL_LAYERS                                             4
 #define RENCODE_MAX_TEMPORAL_LAYER_PATTERN_SIZE                                     9
 
 typedef struct rvcn_temporal_layer_pattern_entry_s
diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc.c b/src/gallium/drivers/radeon/radeon_vcn_enc.c
index 1ab69ab1998..f623ad0387d 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc.c
@@ -63,25 +63,29 @@ static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_pic
       }
       enc->enc_pic.num_temporal_layers = pic->num_temporal_layers;
       enc->enc_pic.temporal_id = 0;
-      enc->enc_pic.rc_layer_init.target_bit_rate = pic->rate_ctrl.target_bitrate;
-      enc->enc_pic.rc_layer_init.peak_bit_rate = pic->rate_ctrl.peak_bitrate;
-      enc->enc_pic.rc_layer_init.frame_rate_num = pic->rate_ctrl.frame_rate_num;
-      enc->enc_pic.rc_layer_init.frame_rate_den = pic->rate_ctrl.frame_rate_den;
-      enc->enc_pic.rc_layer_init.vbv_buffer_size = pic->rate_ctrl.vbv_buffer_size;
-      enc->enc_pic.rc_layer_init.avg_target_bits_per_picture = pic->rate_ctrl.target_bits_picture;
-      enc->enc_pic.rc_layer_init.peak_bits_per_picture_integer =
-         pic->rate_ctrl.peak_bits_picture_integer;
-      enc->enc_pic.rc_layer_init.peak_bits_per_picture_fractional =
-         pic->rate_ctrl.peak_bits_picture_fraction;
-      enc->enc_pic.rc_session_init.vbv_buffer_level = pic->rate_ctrl.vbv_buf_lv;
+      for (int i = 0; i < enc->enc_pic.num_temporal_layers; i++)
+      {
+         enc->enc_pic.rc_layer_init[i].target_bit_rate = pic->rate_ctrl[i].target_bitrate;
+         enc->enc_pic.rc_layer_init[i].peak_bit_rate = pic->rate_ctrl[i].peak_bitrate;
+         enc->enc_pic.rc_layer_init[i].frame_rate_num = pic->rate_ctrl[i].frame_rate_num;
+         enc->enc_pic.rc_layer_init[i].frame_rate_den = pic->rate_ctrl[i].frame_rate_den;
+         enc->enc_pic.rc_layer_init[i].vbv_buffer_size = pic->rate_ctrl[i].vbv_buffer_size;
+         enc->enc_pic.rc_layer_init[i].avg_target_bits_per_picture = pic->rate_ctrl[i].target_bits_picture;
+         enc->enc_pic.rc_layer_init[i].peak_bits_per_picture_integer =
+            pic->rate_ctrl[i].peak_bits_picture_integer;
+         enc->enc_pic.rc_layer_init[i].peak_bits_per_picture_fractional =
+            pic->rate_ctrl[i].peak_bits_picture_fraction;
+      }
+      enc->enc_pic.rc_session_init.vbv_buffer_level = pic->rate_ctrl[0].vbv_buf_lv;
       enc->enc_pic.rc_per_pic.qp = pic->quant_i_frames;
       enc->enc_pic.rc_per_pic.min_qp_app = 0;
       enc->enc_pic.rc_per_pic.max_qp_app = 51;
       enc->enc_pic.rc_per_pic.max_au_size = 0;
-      enc->enc_pic.rc_per_pic.enabled_filler_data = pic->rate_ctrl.fill_data_enable;
+      enc->enc_pic.rc_per_pic.enabled_filler_data = pic->rate_ctrl[0].fill_data_enable;
       enc->enc_pic.rc_per_pic.skip_frame_enable = false;
-      enc->enc_pic.rc_per_pic.enforce_hrd = pic->rate_ctrl.enforce_hrd;
-      switch (pic->rate_ctrl.rate_ctrl_method) {
+      enc->enc_pic.rc_per_pic.enforce_hrd = pic->rate_ctrl[0].enforce_hrd;
+
+      switch (pic->rate_ctrl[0].rate_ctrl_method) {
       case PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE:
          enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_NONE;
          break;
@@ -97,7 +101,6 @@ static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_pic
       default:
          enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_NONE;
       }
-      enc->enc_pic.num_temporal_layers = pic->num_temporal_layers;
    } else if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) {
       struct pipe_h265_enc_picture_desc *pic = (struct pipe_h265_enc_picture_desc *)picture;
       enc->enc_pic.picture_type = pic->picture_type;
@@ -169,14 +172,14 @@ static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_pic
       enc->enc_pic.hevc_spec_misc.cabac_init_flag = pic->slice.cabac_init_flag;
       enc->enc_pic.hevc_spec_misc.half_pel_enabled = 1;
       enc->enc_pic.hevc_spec_misc.quarter_pel_enabled = 1;
-      enc->enc_pic.rc_layer_init.target_bit_rate = pic->rc.target_bitrate;
-      enc->enc_pic.rc_layer_init.peak_bit_rate = pic->rc.peak_bitrate;
-      enc->enc_pic.rc_layer_init.frame_rate_num = pic->rc.frame_rate_num;
-      enc->enc_pic.rc_layer_init.frame_rate_den = pic->rc.frame_rate_den;
-      enc->enc_pic.rc_layer_init.vbv_buffer_size = pic->rc.vbv_buffer_size;
-      enc->enc_pic.rc_layer_init.avg_target_bits_per_picture = pic->rc.target_bits_picture;
-      enc->enc_pic.rc_layer_init.peak_bits_per_picture_integer = pic->rc.peak_bits_picture_integer;
-      enc->enc_pic.rc_layer_init.peak_bits_per_picture_fractional =
+      enc->enc_pic.rc_layer_init[0].target_bit_rate = pic->rc.target_bitrate;
+      enc->enc_pic.rc_layer_init[0].peak_bit_rate = pic->rc.peak_bitrate;
+      enc->enc_pic.rc_layer_init[0].frame_rate_num = pic->rc.frame_rate_num;
+      enc->enc_pic.rc_layer_init[0].frame_rate_den = pic->rc.frame_rate_den;
+      enc->enc_pic.rc_layer_init[0].vbv_buffer_size = pic->rc.vbv_buffer_size;
+      enc->enc_pic.rc_layer_init[0].avg_target_bits_per_picture = pic->rc.target_bits_picture;
+      enc->enc_pic.rc_layer_init[0].peak_bits_per_picture_integer = pic->rc.peak_bits_picture_integer;
+      enc->enc_pic.rc_layer_init[0].peak_bits_per_picture_fractional =
          pic->rc.peak_bits_picture_fraction;
       enc->enc_pic.rc_session_init.vbv_buffer_level = pic->rc.vbv_buf_lv;
       enc->enc_pic.rc_per_pic.qp = pic->rc.quant_i_frames;
@@ -283,12 +286,12 @@ static void radeon_enc_begin_frame(struct pipe_video_codec *encoder,
    if (u_reduce_video_profile(enc->base.profile) == PIPE_VIDEO_FORMAT_MPEG4_AVC) {
       struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
       need_rate_control =
-         (enc->enc_pic.rc_layer_init.target_bit_rate != pic->rate_ctrl.target_bitrate) ||
-         (enc->enc_pic.rc_layer_init.frame_rate_num != pic->rate_ctrl.frame_rate_num) ||
-         (enc->enc_pic.rc_layer_init.frame_rate_den != pic->rate_ctrl.frame_rate_den);
+         (enc->enc_pic.rc_layer_init[0].target_bit_rate != pic->rate_ctrl[0].target_bitrate) ||
+         (enc->enc_pic.rc_layer_init[0].frame_rate_num != pic->rate_ctrl[0].frame_rate_num) ||
+         (enc->enc_pic.rc_layer_init[0].frame_rate_den != pic->rate_ctrl[0].frame_rate_den);
    } else if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) {
       struct pipe_h265_enc_picture_desc *pic = (struct pipe_h265_enc_picture_desc *)picture;
-      need_rate_control = enc->enc_pic.rc_layer_init.target_bit_rate != pic->rc.target_bitrate;
+      need_rate_control = enc->enc_pic.rc_layer_init[0].target_bit_rate != pic->rc.target_bitrate;
    }
 
    radeon_vcn_enc_get_param(enc, picture);
diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc.h b/src/gallium/drivers/radeon/radeon_vcn_enc.h
index b568cfd7afc..f62f1fbf3c1 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc.h
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc.h
@@ -126,6 +126,8 @@
 #define RENCODE_FEEDBACK_BUFFER_MODE_LINEAR                                         0
 #define RENCODE_FEEDBACK_BUFFER_MODE_CIRCULAR                                       1
 
+#define RENCODE_MAX_NUM_TEMPORAL_LAYERS                                             4
+
 #define RADEON_ENC_CS(value) (enc->cs.current.buf[enc->cs.current.cdw++] = (value))
 #define RADEON_ENC_BEGIN(cmd)                                                                      \
    {                                                                                               \
@@ -460,7 +462,7 @@ struct radeon_enc_pic {
    rvcn_enc_h264_spec_misc_t spec_misc;
    rvcn_enc_hevc_spec_misc_t hevc_spec_misc;
    rvcn_enc_rate_ctl_session_init_t rc_session_init;
-   rvcn_enc_rate_ctl_layer_init_t rc_layer_init;
+   rvcn_enc_rate_ctl_layer_init_t rc_layer_init[RENCODE_MAX_NUM_TEMPORAL_LAYERS];
    rvcn_enc_h264_encode_params_t h264_enc_params;
    rvcn_enc_h264_deblocking_filter_t h264_deblock;
    rvcn_enc_hevc_deblocking_filter_t hevc_deblock;
diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
index 5db22c1c977..37645934e81 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
@@ -225,15 +225,16 @@ static void radeon_enc_rc_session_init(struct radeon_encoder *enc)
 
 static void radeon_enc_rc_layer_init(struct radeon_encoder *enc)
 {
+   unsigned int i = enc->enc_pic.temporal_id;
    RADEON_ENC_BEGIN(enc->cmd.rc_layer_init);
-   RADEON_ENC_CS(enc->enc_pic.rc_layer_init.target_bit_rate);
-   RADEON_ENC_CS(enc->enc_pic.rc_layer_init.peak_bit_rate);
-   RADEON_ENC_CS(enc->enc_pic.rc_layer_init.frame_rate_num);
-   RADEON_ENC_CS(enc->enc_pic.rc_layer_init.frame_rate_den);
-   RADEON_ENC_CS(enc->enc_pic.rc_layer_init.vbv_buffer_size);
-   RADEON_ENC_CS(enc->enc_pic.rc_layer_init.avg_target_bits_per_picture);
-   RADEON_ENC_CS(enc->enc_pic.rc_layer_init.peak_bits_per_picture_integer);
-   RADEON_ENC_CS(enc->enc_pic.rc_layer_init.peak_bits_per_picture_fractional);
+   RADEON_ENC_CS(enc->enc_pic.rc_layer_init[i].target_bit_rate);
+   RADEON_ENC_CS(enc->enc_pic.rc_layer_init[i].peak_bit_rate);
+   RADEON_ENC_CS(enc->enc_pic.rc_layer_init[i].frame_rate_num);
+   RADEON_ENC_CS(enc->enc_pic.rc_layer_init[i].frame_rate_den);
+   RADEON_ENC_CS(enc->enc_pic.rc_layer_init[i].vbv_buffer_size);
+   RADEON_ENC_CS(enc->enc_pic.rc_layer_init[i].avg_target_bits_per_picture);
+   RADEON_ENC_CS(enc->enc_pic.rc_layer_init[i].peak_bits_per_picture_integer);
+   RADEON_ENC_CS(enc->enc_pic.rc_layer_init[i].peak_bits_per_picture_fractional);
    RADEON_ENC_END();
 }
 
@@ -1279,6 +1280,8 @@ static void radeon_enc_op_speed(struct radeon_encoder *enc)
 
 static void begin(struct radeon_encoder *enc)
 {
+   unsigned i;
+
    enc->session_info(enc);
    enc->total_task_size = 0;
    enc->task_info(enc, enc->need_feedback);
@@ -1292,10 +1295,16 @@ static void begin(struct radeon_encoder *enc)
    enc->layer_control(enc);
    enc->rc_session_init(enc);
    enc->quality_params(enc);
-   enc->layer_select(enc);
-   enc->rc_layer_init(enc);
-   enc->layer_select(enc);
-   enc->rc_per_pic(enc);
+
+   i = 0;
+   do {
+      enc->enc_pic.temporal_id = i;
+      enc->layer_select(enc);
+      enc->rc_layer_init(enc);
+      enc->layer_select(enc);
+      enc->rc_per_pic(enc);
+   } while (++i < enc->enc_pic.num_temporal_layers);
+
    enc->op_init_rc(enc);
    enc->op_init_rc_vbv(enc);
    *enc->p_task_size = (enc->total_task_size);