diff options
author | Ian Romanick <ian.d.romanick@intel.com> | 2021-06-14 14:11:08 -0700 |
---|---|---|
committer | Marge Bot <eric+marge@anholt.net> | 2021-08-24 19:58:57 +0000 |
commit | 652d304ee95b8b847347cb86450ed83d24eee904 (patch) | |
tree | b1a75385ce63e124ec0af18957c8db79db2b6235 | |
parent | a6db40605e87610f083cca5063ed112af73cb202 (diff) |
spirv: Update headers and metadata from latest Khronos commit
This corresponds to e7b49d7 ("Implement SPV_INTEL_optnone extension
(#230)") in https://github.com/KhronosGroup/SPIRV-Headers.
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12142>
-rw-r--r-- | src/compiler/spirv/spirv.core.grammar.json | 84 | ||||
-rw-r--r-- | src/compiler/spirv/spirv.h | 5 |
2 files changed, 71 insertions, 18 deletions
diff --git a/src/compiler/spirv/spirv.core.grammar.json b/src/compiler/spirv/spirv.core.grammar.json index 04eb87e3f3c..2ff4f9a4427 100644 --- a/src/compiler/spirv/spirv.core.grammar.json +++ b/src/compiler/spirv/spirv.core.grammar.json @@ -2157,7 +2157,7 @@ { "kind" : "IdRef", "name" : "'Offset'" }, { "kind" : "IdRef", "name" : "'Count'" } ], - "capabilities" : [ "Shader" ] + "capabilities" : [ "Shader", "BitInstructions" ] }, { "opname" : "OpBitFieldSExtract", @@ -2170,7 +2170,7 @@ { "kind" : "IdRef", "name" : "'Offset'" }, { "kind" : "IdRef", "name" : "'Count'" } ], - "capabilities" : [ "Shader" ] + "capabilities" : [ "Shader", "BitInstructions" ] }, { "opname" : "OpBitFieldUExtract", @@ -2183,7 +2183,7 @@ { "kind" : "IdRef", "name" : "'Offset'" }, { "kind" : "IdRef", "name" : "'Count'" } ], - "capabilities" : [ "Shader" ] + "capabilities" : [ "Shader", "BitInstructions" ] }, { "opname" : "OpBitReverse", @@ -2194,7 +2194,7 @@ { "kind" : "IdResult" }, { "kind" : "IdRef", "name" : "'Base'" } ], - "capabilities" : [ "Shader" ] + "capabilities" : [ "Shader", "BitInstructions" ] }, { "opname" : "OpBitCount", @@ -8689,6 +8689,10 @@ { "enumerant" : "Const", "value" : "0x0008" + }, + { + "enumerant" : "OptNoneINTEL", + "value" : "0x10000" } ] }, @@ -9445,7 +9449,9 @@ "value" : 39, "capabilities" : [ "Kernel" ], "parameters" : [ - { "kind" : "IdRef", "name" : "'Local Size Hint'" } + { "kind" : "IdRef", "name" : "'x size hint'" }, + { "kind" : "IdRef", "name" : "'y size hint'" }, + { "kind" : "IdRef", "name" : "'z size hint'" } ], "version" : "1.2" }, @@ -10433,35 +10439,51 @@ "enumerants" : [ { "enumerant" : "TRN", - "value" : 0 + "value" : 0, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" }, { "enumerant" : "TRN_ZERO", - "value" : 1 + "value" : 1, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" }, { "enumerant" : "RND", - "value" : 2 + "value" : 2, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" }, { "enumerant" : "RND_ZERO", - "value" : 3 + "value" : 3, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" }, { "enumerant" : "RND_INF", - "value" : 4 + "value" : 4, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" }, { "enumerant" : "RND_MIN_INF", - "value" : 5 + "value" : 5, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" }, { "enumerant" : "RND_CONV", - "value" : 6 + "value" : 6, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" }, { "enumerant" : "RND_CONV_ODD", - "value" : 7 + "value" : 7, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" } ] }, @@ -10489,19 +10511,27 @@ "enumerants" : [ { "enumerant" : "WRAP", - "value" : 0 + "value" : 0, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" }, { "enumerant" : "SAT", - "value" : 1 + "value" : 1, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" }, { "enumerant" : "SAT_ZERO", - "value" : 2 + "value" : 2, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" }, { "enumerant" : "SAT_SYM", - "value" : 3 + "value" : 3, + "capabilities" : [ "ArbitraryPrecisionFixedPointINTEL"], + "version" : "None" } ] }, @@ -13402,6 +13432,12 @@ "version" : "None" }, { + "enumerant" : "BitInstructions", + "value" : 6025, + "extensions" : [ "SPV_KHR_bit_instructions" ], + "version" : "None" + }, + { "enumerant" : "AtomicFloat32AddEXT", "value" : 6033, "capabilities" : [ "Shader" ], @@ -13422,11 +13458,23 @@ "version" : "None" }, { + "enumerant" : "OptNoneINTEL", + "value" : 6094, + "extensions" : [ "SPV_INTEL_optnone" ], + "version" : "None" + }, + { "enumerant" : "AtomicFloat16AddEXT", "value" : 6095, "capabilities" : [ "Shader" ], "extensions" : [ "SPV_EXT_shader_atomic_float16_add" ], "version" : "None" + }, + { + "enumerant" : "DebugInfoModuleINTEL", + "value" : 6114, + "extensions" : [ "SPV_INTEL_debug_module" ], + "version" : "None" } ] }, @@ -13497,7 +13545,7 @@ { "enumerant" : "PackedVectorFormat4x8BitKHR", "value" : 0, - "capabilities" : [ "DotProductInput4x8BitPackedKHR" ], + "extensions" : [ "SPV_KHR_integer_dot_product" ], "version" : "None" } ] diff --git a/src/compiler/spirv/spirv.h b/src/compiler/spirv/spirv.h index 68e9a9aa5dc..79aa4f548c9 100644 --- a/src/compiler/spirv/spirv.h +++ b/src/compiler/spirv/spirv.h @@ -726,6 +726,7 @@ typedef enum SpvFunctionControlShift_ { SpvFunctionControlDontInlineShift = 1, SpvFunctionControlPureShift = 2, SpvFunctionControlConstShift = 3, + SpvFunctionControlOptNoneINTELShift = 16, SpvFunctionControlMax = 0x7fffffff, } SpvFunctionControlShift; @@ -735,6 +736,7 @@ typedef enum SpvFunctionControlMask_ { SpvFunctionControlDontInlineMask = 0x00000002, SpvFunctionControlPureMask = 0x00000004, SpvFunctionControlConstMask = 0x00000008, + SpvFunctionControlOptNoneINTELMask = 0x00010000, } SpvFunctionControlMask; typedef enum SpvMemorySemanticsShift_ { @@ -1049,10 +1051,13 @@ typedef enum SpvCapability_ { SpvCapabilityDotProductInput4x8BitKHR = 6017, SpvCapabilityDotProductInput4x8BitPackedKHR = 6018, SpvCapabilityDotProductKHR = 6019, + SpvCapabilityBitInstructions = 6025, SpvCapabilityAtomicFloat32AddEXT = 6033, SpvCapabilityAtomicFloat64AddEXT = 6034, SpvCapabilityLongConstantCompositeINTEL = 6089, + SpvCapabilityOptNoneINTEL = 6094, SpvCapabilityAtomicFloat16AddEXT = 6095, + SpvCapabilityDebugInfoModuleINTEL = 6114, SpvCapabilityMax = 0x7fffffff, } SpvCapability; |