diff options
| author | Danylo Piliaiev <dpiliaiev@igalia.com> | 2022-03-25 15:26:52 +0200 |
|---|---|---|
| committer | Dylan Baker <dylan.c.baker@intel.com> | 2022-04-21 16:10:22 -0700 |
| commit | 6210e69ea06cc22019a42968a3ee82a3a24b979f (patch) | |
| tree | a772ae546a4b5bc30a79e339b995b6413101feaa | |
| parent | 67ba608c951f7eeb0f13aade8e34e57c01ec4df9 (diff) | |
turnip: Fix the lack of WFM before indirect draws
We have to add WFM to pending bits when we are flushing into CP
for indirect draw to know when they should apply WFM workaround.
Fixes CTS tests:
dEQP-VK.draw.renderpass.indirect_draw.*_data_from_compute.indirect_draw_count*
Fixes: abf0ae014a878d063132a4bf2f2515dc7052f069
("tu: Properly handle waiting on an earlier pipeline stage")
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15577>
(cherry picked from commit 37939e9c5462b871b0b9b00a43c5c9bec1e10e9d)
| -rw-r--r-- | .pick_status.json | 2 | ||||
| -rw-r--r-- | src/freedreno/vulkan/tu_cmd_buffer.c | 8 |
2 files changed, 8 insertions, 2 deletions
diff --git a/.pick_status.json b/.pick_status.json index ad3a65f21be..a03b42b567b 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -524,7 +524,7 @@ "description": "turnip: Fix the lack of WFM before indirect draws", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "because_sha": "abf0ae014a878d063132a4bf2f2515dc7052f069" }, { diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c b/src/freedreno/vulkan/tu_cmd_buffer.c index b3887c515bd..cea2464b345 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.c +++ b/src/freedreno/vulkan/tu_cmd_buffer.c @@ -2876,6 +2876,9 @@ tu_flush_for_stage(struct tu_cache_state *cache, * for any WFI's to finish. This is already done for draw calls, including * before indirect param reads, for the most part, so we just need to WFI. * + * However, some indirect draw opcodes, depending on firmware, don't have + * implicit CP_WAIT_FOR_ME so we have to handle it manually. + * * Transform feedback counters are read via CP_MEM_TO_REG, which implicitly * does CP_WAIT_FOR_ME, but we still need a WFI if the GPU writes it. * @@ -2887,8 +2890,11 @@ tu_flush_for_stage(struct tu_cache_state *cache, * future, or if CP_DRAW_PRED_SET grows the capability to do 32-bit * comparisons, then this will have to be dealt with. */ - if (src_stage > dst_stage) + if (src_stage > dst_stage) { cache->flush_bits |= TU_CMD_FLAG_WAIT_FOR_IDLE; + if (dst_stage == TU_STAGE_CP) + cache->pending_flush_bits |= TU_CMD_FLAG_WAIT_FOR_ME; + } } static enum tu_cmd_access_mask |