diff options
author | Rob Clark <robdclark@chromium.org> | 2020-05-14 12:09:35 -0700 |
---|---|---|
committer | Marge Bot <eric+marge@anholt.net> | 2020-05-19 16:06:17 +0000 |
commit | 599fd861d4898a0e1c51c64f2a5ae2665e052b53 (patch) | |
tree | 223647e183d1c1f45118fe03dc2a2a1d70c457a6 | |
parent | b828929ac9d14309b56177350b37def3b001e8a6 (diff) |
freedreno/ir3: be iterative
It does pick up a few more cf/cp opportunities, according to sharder-db.
But don't think it will be measurable.
But this will allow some future simplification to cp by pulling out it's
internal iteration.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
-rw-r--r-- | src/freedreno/ir3/ir3_cf.c | 4 | ||||
-rw-r--r-- | src/freedreno/ir3/ir3_compiler_nir.c | 18 |
2 files changed, 18 insertions, 4 deletions
diff --git a/src/freedreno/ir3/ir3_cf.c b/src/freedreno/ir3/ir3_cf.c index 89f2a8f52ac..2b35bc5e473 100644 --- a/src/freedreno/ir3/ir3_cf.c +++ b/src/freedreno/ir3/ir3_cf.c @@ -85,7 +85,11 @@ try_conversion_folding(struct ir3_instruction *conv) if (!is_fp16_conv(conv)) return false; + /* NOTE: we can have non-ssa srcs after copy propagation: */ src = ssa(conv->regs[1]); + if (!src) + return false; + if (!is_alu(src)) return false; diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 4a55f578c45..e6a179dc40c 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -3426,6 +3426,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler, struct ir3_context *ctx; struct ir3 *ir; int ret = 0, max_bary; + bool progress; assert(!so->ir); @@ -3554,16 +3555,24 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler, ir3_debug_print(ir, "AFTER: nir->ir3"); - IR3_PASS(ir, ir3_cf); - IR3_PASS(ir, ir3_cp, so); + do { + progress = false; + + progress |= IR3_PASS(ir, ir3_cf); + progress |= IR3_PASS(ir, ir3_cp, so); + progress |= IR3_PASS(ir, ir3_dce, so); + } while (progress); /* at this point, for binning pass, throw away unneeded outputs: * Note that for a6xx and later, we do this after ir3_cp to ensure * that the uniform/constant layout for BS and VS matches, so that * we can re-use same VS_CONST state group. */ - if (so->binning_pass && (ctx->compiler->gpu_id >= 600)) + if (so->binning_pass && (ctx->compiler->gpu_id >= 600)) { fixup_binning_pass(ctx); + /* cleanup the result of removing unneeded outputs: */ + while (IR3_PASS(ir, ir3_dce, so)) {} + } IR3_PASS(ir, ir3_sched_add_deps); @@ -3572,7 +3581,8 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler, */ IR3_PASS(ir, ir3_group); - IR3_PASS(ir, ir3_dce, so); + /* At this point, all the dead code should be long gone: */ + assert(!IR3_PASS(ir, ir3_dce, so)); ret = ir3_sched(ir); if (ret) { |