diff options
| author | Eric Anholt <eric@anholt.net> | 2012-12-17 17:11:21 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2013-03-28 11:46:37 -0700 |
| commit | 55feb19704ae69c580f431d6498344521de369cd (patch) | |
| tree | dfadf3be4d107af06a76ccd77b80ed23f496d8cf | |
| parent | 130138030a3dc8bda20766146ca9fda4047133d3 (diff) | |
i965/vs: Use a send from a 2-register VGRF for shader time writes.
This will let us emit it later, after we're setting up MRFs for the
URB write.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.cpp | 24 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_emit.cpp | 3 |
2 files changed, 13 insertions, 14 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 35dd9aed43c..a40a0b47570 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -222,7 +222,7 @@ vec4_instruction::is_math() bool vec4_instruction::is_send_from_grf() { - return false; + return opcode == SHADER_OPCODE_SHADER_TIME_ADD; } bool @@ -1264,20 +1264,20 @@ vec4_visitor::emit_shader_time_write(enum shader_time_shader_type type, int shader_time_index = brw_get_shader_time_index(brw, prog, &vp->Base, type); - int base_mrf = 6; + dst_reg dst = + dst_reg(this, glsl_type::get_array_instance(glsl_type::vec4_type, 2)); - dst_reg offset_mrf = dst_reg(MRF, base_mrf); - offset_mrf.type = BRW_REGISTER_TYPE_UD; - emit(MOV(offset_mrf, src_reg(shader_time_index * SHADER_TIME_STRIDE))); + dst_reg offset = dst; + dst_reg time = dst; + time.reg_offset++; - dst_reg time_mrf = dst_reg(MRF, base_mrf + 1); - time_mrf.type = BRW_REGISTER_TYPE_UD; - emit(MOV(time_mrf, src_reg(value))); + offset.type = BRW_REGISTER_TYPE_UD; + emit(MOV(offset, src_reg(shader_time_index * SHADER_TIME_STRIDE))); - vec4_instruction *inst; - inst = emit(SHADER_OPCODE_SHADER_TIME_ADD); - inst->base_mrf = base_mrf; - inst->mlen = 2; + time.type = BRW_REGISTER_TYPE_UD; + emit(MOV(time, src_reg(value))); + + emit(SHADER_OPCODE_SHADER_TIME_ADD, dst_reg(), src_reg(dst)); } bool diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp index 54f3efd08ec..cb49a042390 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp @@ -674,8 +674,7 @@ vec4_generator::generate_vs_instruction(vec4_instruction *instruction, break; case SHADER_OPCODE_SHADER_TIME_ADD: - brw_shader_time_add(p, brw_message_reg(inst->base_mrf), - SURF_INDEX_VS_SHADER_TIME); + brw_shader_time_add(p, src[0], SURF_INDEX_VS_SHADER_TIME); break; default: |