diff options
author | Marek Olšák <marek.olsak@amd.com> | 2021-12-08 00:56:03 -0500 |
---|---|---|
committer | Marek Olšák <marek.olsak@amd.com> | 2022-01-05 01:36:10 -0500 |
commit | 5406ad93a9e61cc2088c7fd4b5d038db794bd4f5 (patch) | |
tree | b62b9614df4d48aec56dfce8b335f4ca9cbf69b3 | |
parent | 470b61f3a972e9ae8fc8d2715a110490576d6be3 (diff) |
radeonsi: set COMPUTE_DESTINATION_EN_SEn to spi_cu_en
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14122>
-rw-r--r-- | src/gallium/drivers/radeonsi/si_compute.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index e442ba17c79..7447f7923ee 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -367,6 +367,8 @@ static void si_set_global_binding(struct pipe_context *ctx, unsigned first, unsi void si_emit_initial_compute_regs(struct si_context *sctx, struct radeon_cmdbuf *cs) { + const struct radeon_info *info = &sctx->screen->info; + radeon_begin(cs); radeon_set_sh_reg(R_00B834_COMPUTE_PGM_HI, S_00B834_DATA(sctx->screen->info.address32_hi >> 8)); @@ -374,8 +376,8 @@ void si_emit_initial_compute_regs(struct si_context *sctx, struct radeon_cmdbuf radeon_set_sh_reg_seq(R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0, 2); /* R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0 / SE1, * renamed COMPUTE_DESTINATION_EN_SEn on gfx10. */ - radeon_emit(S_00B858_SH0_CU_EN(0xffff) | S_00B858_SH1_CU_EN(0xffff)); - radeon_emit(S_00B858_SH0_CU_EN(0xffff) | S_00B858_SH1_CU_EN(0xffff)); + radeon_emit(S_00B858_SH0_CU_EN(info->spi_cu_en) | S_00B858_SH1_CU_EN(info->spi_cu_en)); + radeon_emit(S_00B858_SH0_CU_EN(info->spi_cu_en) | S_00B858_SH1_CU_EN(info->spi_cu_en)); if (sctx->chip_class == GFX6) { /* This register has been moved to R_00CD20_COMPUTE_MAX_WAVE_ID @@ -397,8 +399,8 @@ void si_emit_initial_compute_regs(struct si_context *sctx, struct radeon_cmdbuf if (sctx->chip_class >= GFX7) { /* Also set R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE2 / SE3 */ radeon_set_sh_reg_seq(R_00B864_COMPUTE_STATIC_THREAD_MGMT_SE2, 2); - radeon_emit(S_00B858_SH0_CU_EN(0xffff) | S_00B858_SH1_CU_EN(0xffff)); - radeon_emit(S_00B858_SH0_CU_EN(0xffff) | S_00B858_SH1_CU_EN(0xffff)); + radeon_emit(S_00B858_SH0_CU_EN(info->spi_cu_en) | S_00B858_SH1_CU_EN(info->spi_cu_en)); + radeon_emit(S_00B858_SH0_CU_EN(info->spi_cu_en) | S_00B858_SH1_CU_EN(info->spi_cu_en)); /* Disable profiling on compute queues. */ if (cs != &sctx->gfx_cs || !sctx->screen->info.has_graphics) { |